1acd90bff2
Create and use MX PIC as a peripheral interrupt controller when more than 1 processor is enabled on xtfpga board. Connect xtensa CPU cores to the MX PIC and select secondary reset vector on all cores except the first one. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> |
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.. | ||
bootparam.h | ||
Makefile.objs | ||
mx_pic.c | ||
pic_cpu.c | ||
sim.c | ||
xtensa_memory.c | ||
xtensa_memory.h | ||
xtfpga.c |