qemu-e2k/target-mips
Leon Alrae d208ac0c2e target-mips: generate fences
Make use of memory barrier TCG opcode in MIPS front end.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-09-23 07:07:30 +01:00
..
cpu-qom.h
cpu.c
cpu.h target-*: Clean up cpu.h header guards 2016-07-12 16:19:16 +02:00
dsp_helper.c
gdbstub.c target-mips: Implement FCR31's R/W bitmask and related functionalities 2016-06-24 13:43:52 +01:00
helper.c target-mips: fix EntryHi.EHINV being cleared on TLB exception 2016-07-28 11:24:02 +01:00
helper.h target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> 2016-06-24 13:41:47 +01:00
kvm_mips.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
kvm.c kvm-irqchip: i386: add hook for add/remove virq 2016-07-21 20:44:19 +03:00
lmi_helper.c
machine.c target-mips: change ASID type to hold more than 8 bits 2016-07-12 09:10:19 +01:00
Makefile.objs
mips-defs.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
mips-semi.c
msa_helper.c softfloat: Implement run-time-configurable meaning of signaling NaN bit 2016-06-24 13:40:37 +01:00
op_helper.c tcg: Merge GETPC and GETRA 2016-09-16 08:12:11 -07:00
TODO
translate_init.c target-mips: add 24KEc CPU definition 2016-09-23 07:07:29 +01:00
translate.c target-mips: generate fences 2016-09-23 07:07:30 +01:00