Michael S. Tsirkin 1b28762a33 arm: add trailing ; after MISMATCH_CHECK ...

Macro calls without a trailing ; look weird in C, this works as a side
effect of how QEMU_BUILD_BUG_ON is implemented. Fix this up.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

2017-02-01 03:37:18 +02:00

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arch_dump.c

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arm_ldst.h

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arm-powerctl.c

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arm-powerctl.h

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arm-semi.c

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cpu64.c

target-arm: Enable EL2 feature bit on A53 and A57

2017-01-20 11:15:10 +00:00

cpu-qom.h

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cpu.c

armv7m: R14 should reset to 0xffffffff

2017-01-27 15:29:08 +00:00

cpu.h

armv7m: Report no-coprocessor faults correctly

2017-01-27 15:29:08 +00:00

crypto_helper.c

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gdbstub64.c

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gdbstub.c

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helper-a64.c

target-arm: Use clrsb helper

2017-01-10 08:47:48 -08:00

helper-a64.h

target-arm: Use clrsb helper

2017-01-10 08:47:48 -08:00

helper.c

armv7m: Report no-coprocessor faults correctly

2017-01-27 15:29:08 +00:00

helper.h

target-arm: Use clz opcode

2017-01-10 08:06:11 -08:00

internals.h

armv7m: Fix reads of CONTROL register bit 1

2017-01-27 15:20:21 +00:00

iwmmxt_helper.c

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kvm32.c

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kvm64.c

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kvm_arm.h

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kvm-consts.h

arm: add trailing ; after MISMATCH_CHECK

2017-02-01 03:37:18 +02:00

kvm-stub.c

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kvm.c

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machine.c

armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR

2017-01-27 15:29:08 +00:00

Makefile.objs

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monitor.c

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neon_helper.c

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op_addsub.h

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op_helper.c

target-arm: Log AArch64 exception returns

2016-12-27 14:59:25 +00:00

psci.c

target/arm/psci.c: If EL2 implemented, start CPUs in EL2

2017-01-20 11:15:10 +00:00

trace-events

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translate-a64.c

target/arm: Fix ubfx et al for aarch64

2017-01-13 09:48:20 -08:00

translate.c

armv7m: Report no-coprocessor faults correctly

2017-01-27 15:29:08 +00:00

translate.h

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