qemu-e2k/target
Rahul Pathak e1d084a852 target/riscv: add Ventana's Veyron V1 CPU
Add a virtual CPU for Ventana's first CPU named veyron-v1. It runs
exclusively for the rv64 target. It's tested with the 'virt' board.

CPU specs and general information can be found here:

https://www.nextplatform.com/2023/02/02/the-first-risc-v-shot-across-the-datacenter-bow/

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230418123624.16414-1-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-05-05 10:49:50 +10:00
..
alpha
arm target/arm: Add compile time asserts to load/store_cpu_field macros 2023-05-02 15:47:41 +01:00
avr
cris
hexagon Hexagon (target/hexagon) Add overrides for cache/sync/barrier instructions 2023-04-21 09:32:52 -07:00
hppa
i386 target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration 2023-04-28 12:50:34 +02:00
loongarch target/loongarch: Enables plugins to get instruction codes 2023-04-04 19:33:23 +08:00
m68k target/m68k: Use tcg_constant_i32 in gen_ea_mode 2023-03-13 07:03:39 -07:00
microblaze
mips target/mips: tcg: detect out-of-bounds accesses to cpu_gpr and cpu_gpr_hi 2023-04-20 11:17:35 +02:00
nios2
openrisc
ppc target/ppc: Fix temp usage in gen_op_arith_modw 2023-04-09 19:21:27 +02:00
riscv target/riscv: add Ventana's Veyron V1 CPU 2023-05-05 10:49:50 +10:00
rx target/rx: Avoid tcg_const_i32 2023-03-13 06:44:37 -07:00
s390x s390x/gdb: Split s390-virt.xml 2023-04-28 08:05:37 +02:00
sh4 target/sh4: Honor QEMU_LOG_FILENAME with QEMU_LOG=cpu 2023-03-16 10:31:25 +01:00
sparc tcg/sparc: Avoid tcg_const_tl in gen_edge 2023-03-13 06:44:37 -07:00
tricore target/tricore: Use min/max for saturate 2023-03-13 07:03:39 -07:00
xtensa
Kconfig
meson.build