24a4d59aa7
Move all of it into accel/tcg/monitor.c. This puts everything about tcg that is only used by the monitor in the same place. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
684 lines
21 KiB
C
684 lines
21 KiB
C
/*
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* Host code generation
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "trace.h"
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#include "disas/disas.h"
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#include "exec/exec-all.h"
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#include "tcg/tcg.h"
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#if defined(CONFIG_USER_ONLY)
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#include "qemu.h"
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#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
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#include <sys/param.h>
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#if __FreeBSD_version >= 700104
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#define HAVE_KINFO_GETVMMAP
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#define sigqueue sigqueue_freebsd /* avoid redefinition */
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#include <sys/proc.h>
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#include <machine/profile.h>
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#define _KERNEL
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#include <sys/user.h>
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#undef _KERNEL
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#undef sigqueue
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#include <libutil.h>
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#endif
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#endif
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#else
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#include "exec/ram_addr.h"
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#endif
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#include "exec/cputlb.h"
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#include "exec/translate-all.h"
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#include "exec/translator.h"
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#include "exec/tb-flush.h"
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#include "qemu/bitmap.h"
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#include "qemu/qemu-print.h"
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#include "qemu/main-loop.h"
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#include "qemu/cacheinfo.h"
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#include "qemu/timer.h"
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#include "exec/log.h"
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#include "sysemu/cpus.h"
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#include "sysemu/cpu-timers.h"
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#include "sysemu/tcg.h"
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#include "qapi/error.h"
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#include "hw/core/tcg-cpu-ops.h"
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#include "tb-jmp-cache.h"
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#include "tb-hash.h"
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#include "tb-context.h"
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#include "internal-common.h"
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#include "internal-target.h"
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#include "perf.h"
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#include "tcg/insn-start-words.h"
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TBContext tb_ctx;
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/*
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* Encode VAL as a signed leb128 sequence at P.
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* Return P incremented past the encoded value.
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*/
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static uint8_t *encode_sleb128(uint8_t *p, int64_t val)
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{
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int more, byte;
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do {
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byte = val & 0x7f;
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val >>= 7;
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more = !((val == 0 && (byte & 0x40) == 0)
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|| (val == -1 && (byte & 0x40) != 0));
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if (more) {
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byte |= 0x80;
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}
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*p++ = byte;
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} while (more);
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return p;
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}
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/*
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* Decode a signed leb128 sequence at *PP; increment *PP past the
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* decoded value. Return the decoded value.
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*/
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static int64_t decode_sleb128(const uint8_t **pp)
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{
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const uint8_t *p = *pp;
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int64_t val = 0;
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int byte, shift = 0;
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do {
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byte = *p++;
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val |= (int64_t)(byte & 0x7f) << shift;
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shift += 7;
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} while (byte & 0x80);
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if (shift < TARGET_LONG_BITS && (byte & 0x40)) {
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val |= -(int64_t)1 << shift;
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}
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*pp = p;
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return val;
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}
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/* Encode the data collected about the instructions while compiling TB.
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Place the data at BLOCK, and return the number of bytes consumed.
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The logical table consists of TARGET_INSN_START_WORDS target_ulong's,
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which come from the target's insn_start data, followed by a uintptr_t
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which comes from the host pc of the end of the code implementing the insn.
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Each line of the table is encoded as sleb128 deltas from the previous
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line. The seed for the first line is { tb->pc, 0..., tb->tc.ptr }.
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That is, the first column is seeded with the guest pc, the last column
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with the host pc, and the middle columns with zeros. */
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static int encode_search(TranslationBlock *tb, uint8_t *block)
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{
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uint8_t *highwater = tcg_ctx->code_gen_highwater;
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uint64_t *insn_data = tcg_ctx->gen_insn_data;
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uint16_t *insn_end_off = tcg_ctx->gen_insn_end_off;
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uint8_t *p = block;
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int i, j, n;
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for (i = 0, n = tb->icount; i < n; ++i) {
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uint64_t prev, curr;
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for (j = 0; j < TARGET_INSN_START_WORDS; ++j) {
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if (i == 0) {
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prev = (!(tb_cflags(tb) & CF_PCREL) && j == 0 ? tb->pc : 0);
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} else {
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prev = insn_data[(i - 1) * TARGET_INSN_START_WORDS + j];
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}
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curr = insn_data[i * TARGET_INSN_START_WORDS + j];
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p = encode_sleb128(p, curr - prev);
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}
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prev = (i == 0 ? 0 : insn_end_off[i - 1]);
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curr = insn_end_off[i];
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p = encode_sleb128(p, curr - prev);
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/* Test for (pending) buffer overflow. The assumption is that any
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one row beginning below the high water mark cannot overrun
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the buffer completely. Thus we can test for overflow after
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encoding a row without having to check during encoding. */
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if (unlikely(p > highwater)) {
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return -1;
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}
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}
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return p - block;
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}
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static int cpu_unwind_data_from_tb(TranslationBlock *tb, uintptr_t host_pc,
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uint64_t *data)
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{
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uintptr_t iter_pc = (uintptr_t)tb->tc.ptr;
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const uint8_t *p = tb->tc.ptr + tb->tc.size;
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int i, j, num_insns = tb->icount;
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host_pc -= GETPC_ADJ;
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if (host_pc < iter_pc) {
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return -1;
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}
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memset(data, 0, sizeof(uint64_t) * TARGET_INSN_START_WORDS);
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if (!(tb_cflags(tb) & CF_PCREL)) {
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data[0] = tb->pc;
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}
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/*
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* Reconstruct the stored insn data while looking for the point
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* at which the end of the insn exceeds host_pc.
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*/
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for (i = 0; i < num_insns; ++i) {
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for (j = 0; j < TARGET_INSN_START_WORDS; ++j) {
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data[j] += decode_sleb128(&p);
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}
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iter_pc += decode_sleb128(&p);
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if (iter_pc > host_pc) {
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return num_insns - i;
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}
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}
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return -1;
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}
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/*
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* The cpu state corresponding to 'host_pc' is restored in
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* preparation for exiting the TB.
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*/
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void cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
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uintptr_t host_pc)
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{
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uint64_t data[TARGET_INSN_START_WORDS];
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int insns_left = cpu_unwind_data_from_tb(tb, host_pc, data);
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if (insns_left < 0) {
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return;
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}
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if (tb_cflags(tb) & CF_USE_ICOUNT) {
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assert(icount_enabled());
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/*
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* Reset the cycle counter to the start of the block and
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* shift if to the number of actually executed instructions.
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*/
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cpu->neg.icount_decr.u16.low += insns_left;
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}
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cpu->cc->tcg_ops->restore_state_to_opc(cpu, tb, data);
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}
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bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc)
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{
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/*
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* The host_pc has to be in the rx region of the code buffer.
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* If it is not we will not be able to resolve it here.
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* The two cases where host_pc will not be correct are:
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*
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* - fault during translation (instruction fetch)
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* - fault from helper (not using GETPC() macro)
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*
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* Either way we need return early as we can't resolve it here.
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*/
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if (in_code_gen_buffer((const void *)(host_pc - tcg_splitwx_diff))) {
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TranslationBlock *tb = tcg_tb_lookup(host_pc);
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if (tb) {
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cpu_restore_state_from_tb(cpu, tb, host_pc);
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return true;
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}
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}
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return false;
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}
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bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data)
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{
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if (in_code_gen_buffer((const void *)(host_pc - tcg_splitwx_diff))) {
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TranslationBlock *tb = tcg_tb_lookup(host_pc);
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if (tb) {
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return cpu_unwind_data_from_tb(tb, host_pc, data) >= 0;
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}
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}
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return false;
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}
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void page_init(void)
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{
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page_size_init();
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page_table_config_init();
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}
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/*
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* Isolate the portion of code gen which can setjmp/longjmp.
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* Return the size of the generated code, or negative on error.
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*/
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static int setjmp_gen_code(CPUArchState *env, TranslationBlock *tb,
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vaddr pc, void *host_pc,
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int *max_insns, int64_t *ti)
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{
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int ret = sigsetjmp(tcg_ctx->jmp_trans, 0);
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if (unlikely(ret != 0)) {
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return ret;
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}
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tcg_func_start(tcg_ctx);
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tcg_ctx->cpu = env_cpu(env);
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gen_intermediate_code(env_cpu(env), tb, max_insns, pc, host_pc);
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assert(tb->size != 0);
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tcg_ctx->cpu = NULL;
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*max_insns = tb->icount;
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return tcg_gen_code(tcg_ctx, tb, pc);
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}
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/* Called with mmap_lock held for user mode emulation. */
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TranslationBlock *tb_gen_code(CPUState *cpu,
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vaddr pc, uint64_t cs_base,
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uint32_t flags, int cflags)
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{
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CPUArchState *env = cpu_env(cpu);
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TranslationBlock *tb, *existing_tb;
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tb_page_addr_t phys_pc, phys_p2;
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tcg_insn_unit *gen_code_buf;
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int gen_code_size, search_size, max_insns;
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int64_t ti;
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void *host_pc;
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assert_memory_lock();
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qemu_thread_jit_write();
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phys_pc = get_page_addr_code_hostp(env, pc, &host_pc);
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if (phys_pc == -1) {
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/* Generate a one-shot TB with 1 insn in it */
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cflags = (cflags & ~CF_COUNT_MASK) | CF_LAST_IO | 1;
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}
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max_insns = cflags & CF_COUNT_MASK;
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if (max_insns == 0) {
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max_insns = TCG_MAX_INSNS;
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}
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QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 != TCG_MAX_INSNS);
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buffer_overflow:
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assert_no_pages_locked();
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tb = tcg_tb_alloc(tcg_ctx);
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if (unlikely(!tb)) {
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/* flush must be done */
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tb_flush(cpu);
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mmap_unlock();
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/* Make the execution loop process the flush as soon as possible. */
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cpu->exception_index = EXCP_INTERRUPT;
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cpu_loop_exit(cpu);
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}
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gen_code_buf = tcg_ctx->code_gen_ptr;
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tb->tc.ptr = tcg_splitwx_to_rx(gen_code_buf);
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if (!(cflags & CF_PCREL)) {
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tb->pc = pc;
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}
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tb->cs_base = cs_base;
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tb->flags = flags;
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tb->cflags = cflags;
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tb_set_page_addr0(tb, phys_pc);
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tb_set_page_addr1(tb, -1);
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if (phys_pc != -1) {
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tb_lock_page0(phys_pc);
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}
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tcg_ctx->gen_tb = tb;
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tcg_ctx->addr_type = TARGET_LONG_BITS == 32 ? TCG_TYPE_I32 : TCG_TYPE_I64;
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#ifdef CONFIG_SOFTMMU
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tcg_ctx->page_bits = TARGET_PAGE_BITS;
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tcg_ctx->page_mask = TARGET_PAGE_MASK;
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tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
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#endif
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tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS;
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#ifdef TCG_GUEST_DEFAULT_MO
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tcg_ctx->guest_mo = TCG_GUEST_DEFAULT_MO;
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#else
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tcg_ctx->guest_mo = TCG_MO_ALL;
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#endif
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restart_translate:
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trace_translate_block(tb, pc, tb->tc.ptr);
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gen_code_size = setjmp_gen_code(env, tb, pc, host_pc, &max_insns, &ti);
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if (unlikely(gen_code_size < 0)) {
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switch (gen_code_size) {
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case -1:
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/*
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* Overflow of code_gen_buffer, or the current slice of it.
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*
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* TODO: We don't need to re-do gen_intermediate_code, nor
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* should we re-do the tcg optimization currently hidden
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* inside tcg_gen_code. All that should be required is to
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* flush the TBs, allocate a new TB, re-initialize it per
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* above, and re-do the actual code generation.
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*/
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qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
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"Restarting code generation for "
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"code_gen_buffer overflow\n");
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tb_unlock_pages(tb);
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tcg_ctx->gen_tb = NULL;
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goto buffer_overflow;
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case -2:
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/*
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* The code generated for the TranslationBlock is too large.
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* The maximum size allowed by the unwind info is 64k.
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* There may be stricter constraints from relocations
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* in the tcg backend.
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*
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* Try again with half as many insns as we attempted this time.
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* If a single insn overflows, there's a bug somewhere...
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*/
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assert(max_insns > 1);
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max_insns /= 2;
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qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
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"Restarting code generation with "
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"smaller translation block (max %d insns)\n",
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max_insns);
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/*
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* The half-sized TB may not cross pages.
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* TODO: Fix all targets that cross pages except with
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* the first insn, at which point this can't be reached.
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*/
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phys_p2 = tb_page_addr1(tb);
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if (unlikely(phys_p2 != -1)) {
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tb_unlock_page1(phys_pc, phys_p2);
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tb_set_page_addr1(tb, -1);
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}
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goto restart_translate;
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case -3:
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/*
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* We had a page lock ordering problem. In order to avoid
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* deadlock we had to drop the lock on page0, which means
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* that everything we translated so far is compromised.
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* Restart with locks held on both pages.
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*/
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qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
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"Restarting code generation with re-locked pages");
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goto restart_translate;
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default:
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g_assert_not_reached();
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}
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}
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tcg_ctx->gen_tb = NULL;
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search_size = encode_search(tb, (void *)gen_code_buf + gen_code_size);
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if (unlikely(search_size < 0)) {
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tb_unlock_pages(tb);
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goto buffer_overflow;
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}
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tb->tc.size = gen_code_size;
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/*
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* For CF_PCREL, attribute all executions of the generated code
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* to its first mapping.
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*/
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perf_report_code(pc, tb, tcg_splitwx_to_rx(gen_code_buf));
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if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM) &&
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qemu_log_in_addr_range(pc)) {
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FILE *logfile = qemu_log_trylock();
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if (logfile) {
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int code_size, data_size;
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const tcg_target_ulong *rx_data_gen_ptr;
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size_t chunk_start;
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int insn = 0;
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if (tcg_ctx->data_gen_ptr) {
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rx_data_gen_ptr = tcg_splitwx_to_rx(tcg_ctx->data_gen_ptr);
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code_size = (const void *)rx_data_gen_ptr - tb->tc.ptr;
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data_size = gen_code_size - code_size;
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} else {
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rx_data_gen_ptr = 0;
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code_size = gen_code_size;
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data_size = 0;
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}
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/* Dump header and the first instruction */
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fprintf(logfile, "OUT: [size=%d]\n", gen_code_size);
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fprintf(logfile,
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" -- guest addr 0x%016" PRIx64 " + tb prologue\n",
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tcg_ctx->gen_insn_data[insn * TARGET_INSN_START_WORDS]);
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chunk_start = tcg_ctx->gen_insn_end_off[insn];
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disas(logfile, tb->tc.ptr, chunk_start);
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/*
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* Dump each instruction chunk, wrapping up empty chunks into
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* the next instruction. The whole array is offset so the
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* first entry is the beginning of the 2nd instruction.
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*/
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while (insn < tb->icount) {
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size_t chunk_end = tcg_ctx->gen_insn_end_off[insn];
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if (chunk_end > chunk_start) {
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fprintf(logfile, " -- guest addr 0x%016" PRIx64 "\n",
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tcg_ctx->gen_insn_data[insn * TARGET_INSN_START_WORDS]);
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disas(logfile, tb->tc.ptr + chunk_start,
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chunk_end - chunk_start);
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chunk_start = chunk_end;
|
|
}
|
|
insn++;
|
|
}
|
|
|
|
if (chunk_start < code_size) {
|
|
fprintf(logfile, " -- tb slow paths + alignment\n");
|
|
disas(logfile, tb->tc.ptr + chunk_start,
|
|
code_size - chunk_start);
|
|
}
|
|
|
|
/* Finally dump any data we may have after the block */
|
|
if (data_size) {
|
|
int i;
|
|
fprintf(logfile, " data: [size=%d]\n", data_size);
|
|
for (i = 0; i < data_size / sizeof(tcg_target_ulong); i++) {
|
|
if (sizeof(tcg_target_ulong) == 8) {
|
|
fprintf(logfile,
|
|
"0x%08" PRIxPTR ": .quad 0x%016" TCG_PRIlx "\n",
|
|
(uintptr_t)&rx_data_gen_ptr[i], rx_data_gen_ptr[i]);
|
|
} else if (sizeof(tcg_target_ulong) == 4) {
|
|
fprintf(logfile,
|
|
"0x%08" PRIxPTR ": .long 0x%08" TCG_PRIlx "\n",
|
|
(uintptr_t)&rx_data_gen_ptr[i], rx_data_gen_ptr[i]);
|
|
} else {
|
|
qemu_build_not_reached();
|
|
}
|
|
}
|
|
}
|
|
fprintf(logfile, "\n");
|
|
qemu_log_unlock(logfile);
|
|
}
|
|
}
|
|
|
|
qatomic_set(&tcg_ctx->code_gen_ptr, (void *)
|
|
ROUND_UP((uintptr_t)gen_code_buf + gen_code_size + search_size,
|
|
CODE_GEN_ALIGN));
|
|
|
|
/* init jump list */
|
|
qemu_spin_init(&tb->jmp_lock);
|
|
tb->jmp_list_head = (uintptr_t)NULL;
|
|
tb->jmp_list_next[0] = (uintptr_t)NULL;
|
|
tb->jmp_list_next[1] = (uintptr_t)NULL;
|
|
tb->jmp_dest[0] = (uintptr_t)NULL;
|
|
tb->jmp_dest[1] = (uintptr_t)NULL;
|
|
|
|
/* init original jump addresses which have been set during tcg_gen_code() */
|
|
if (tb->jmp_reset_offset[0] != TB_JMP_OFFSET_INVALID) {
|
|
tb_reset_jump(tb, 0);
|
|
}
|
|
if (tb->jmp_reset_offset[1] != TB_JMP_OFFSET_INVALID) {
|
|
tb_reset_jump(tb, 1);
|
|
}
|
|
|
|
/*
|
|
* If the TB is not associated with a physical RAM page then it must be
|
|
* a temporary one-insn TB, and we have nothing left to do. Return early
|
|
* before attempting to link to other TBs or add to the lookup table.
|
|
*/
|
|
if (tb_page_addr0(tb) == -1) {
|
|
assert_no_pages_locked();
|
|
return tb;
|
|
}
|
|
|
|
/*
|
|
* Insert TB into the corresponding region tree before publishing it
|
|
* through QHT. Otherwise rewinding happened in the TB might fail to
|
|
* lookup itself using host PC.
|
|
*/
|
|
tcg_tb_insert(tb);
|
|
|
|
/*
|
|
* No explicit memory barrier is required -- tb_link_page() makes the
|
|
* TB visible in a consistent state.
|
|
*/
|
|
existing_tb = tb_link_page(tb);
|
|
assert_no_pages_locked();
|
|
|
|
/* if the TB already exists, discard what we just translated */
|
|
if (unlikely(existing_tb != tb)) {
|
|
uintptr_t orig_aligned = (uintptr_t)gen_code_buf;
|
|
|
|
orig_aligned -= ROUND_UP(sizeof(*tb), qemu_icache_linesize);
|
|
qatomic_set(&tcg_ctx->code_gen_ptr, (void *)orig_aligned);
|
|
tcg_tb_remove(tb);
|
|
return existing_tb;
|
|
}
|
|
return tb;
|
|
}
|
|
|
|
/* user-mode: call with mmap_lock held */
|
|
void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr)
|
|
{
|
|
TranslationBlock *tb;
|
|
|
|
assert_memory_lock();
|
|
|
|
tb = tcg_tb_lookup(retaddr);
|
|
if (tb) {
|
|
/* We can use retranslation to find the PC. */
|
|
cpu_restore_state_from_tb(cpu, tb, retaddr);
|
|
tb_phys_invalidate(tb, -1);
|
|
} else {
|
|
/* The exception probably happened in a helper. The CPU state should
|
|
have been saved before calling it. Fetch the PC from there. */
|
|
CPUArchState *env = cpu_env(cpu);
|
|
vaddr pc;
|
|
uint64_t cs_base;
|
|
tb_page_addr_t addr;
|
|
uint32_t flags;
|
|
|
|
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
|
|
addr = get_page_addr_code(env, pc);
|
|
if (addr != -1) {
|
|
tb_invalidate_phys_range(addr, addr);
|
|
}
|
|
}
|
|
}
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
/*
|
|
* In deterministic execution mode, instructions doing device I/Os
|
|
* must be at the end of the TB.
|
|
*
|
|
* Called by softmmu_template.h, with iothread mutex not held.
|
|
*/
|
|
void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
|
|
{
|
|
TranslationBlock *tb;
|
|
CPUClass *cc;
|
|
uint32_t n;
|
|
|
|
tb = tcg_tb_lookup(retaddr);
|
|
if (!tb) {
|
|
cpu_abort(cpu, "cpu_io_recompile: could not find TB for pc=%p",
|
|
(void *)retaddr);
|
|
}
|
|
cpu_restore_state_from_tb(cpu, tb, retaddr);
|
|
|
|
/*
|
|
* Some guests must re-execute the branch when re-executing a delay
|
|
* slot instruction. When this is the case, adjust icount and N
|
|
* to account for the re-execution of the branch.
|
|
*/
|
|
n = 1;
|
|
cc = CPU_GET_CLASS(cpu);
|
|
if (cc->tcg_ops->io_recompile_replay_branch &&
|
|
cc->tcg_ops->io_recompile_replay_branch(cpu, tb)) {
|
|
cpu->neg.icount_decr.u16.low++;
|
|
n = 2;
|
|
}
|
|
|
|
/*
|
|
* Exit the loop and potentially generate a new TB executing the
|
|
* just the I/O insns. We also limit instrumentation to memory
|
|
* operations only (which execute after completion) so we don't
|
|
* double instrument the instruction.
|
|
*/
|
|
cpu->cflags_next_tb = curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO | n;
|
|
|
|
if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
|
|
vaddr pc = log_pc(cpu, tb);
|
|
if (qemu_log_in_addr_range(pc)) {
|
|
qemu_log("cpu_io_recompile: rewound execution of TB to %016"
|
|
VADDR_PRIx "\n", pc);
|
|
}
|
|
}
|
|
|
|
cpu_loop_exit_noexc(cpu);
|
|
}
|
|
|
|
#else /* CONFIG_USER_ONLY */
|
|
|
|
void cpu_interrupt(CPUState *cpu, int mask)
|
|
{
|
|
g_assert(qemu_mutex_iothread_locked());
|
|
cpu->interrupt_request |= mask;
|
|
qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
|
|
}
|
|
|
|
#endif /* CONFIG_USER_ONLY */
|
|
|
|
/*
|
|
* Called by generic code at e.g. cpu reset after cpu creation,
|
|
* therefore we must be prepared to allocate the jump cache.
|
|
*/
|
|
void tcg_flush_jmp_cache(CPUState *cpu)
|
|
{
|
|
CPUJumpCache *jc = cpu->tb_jmp_cache;
|
|
|
|
/* During early initialization, the cache may not yet be allocated. */
|
|
if (unlikely(jc == NULL)) {
|
|
return;
|
|
}
|
|
|
|
for (int i = 0; i < TB_JMP_CACHE_SIZE; i++) {
|
|
qatomic_set(&jc->array[i].tb, NULL);
|
|
}
|
|
}
|
|
|
|
/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
|
|
void tcg_flush_softmmu_tlb(CPUState *cs)
|
|
{
|
|
#ifdef CONFIG_SOFTMMU
|
|
tlb_flush(cs);
|
|
#endif
|
|
}
|