f61c3fb56b
'ARM SBCon two-wire serial bus interface' is the official name describing the pair of registers used to bitbanging I2C in the Versatile boards. Make the private VersatileI2CState structure as public ArmSbconI2CState. Add the TYPE_ARM_SBCON_I2C, alias to our current TYPE_VERSATILE_I2C model. Rename the memory region description as 'arm_sbcon_i2c'. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200617072539.32686-5-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
36 lines
857 B
C
36 lines
857 B
C
/*
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* ARM SBCon two-wire serial bus interface (I2C bitbang)
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* a.k.a.
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* ARM Versatile I2C controller
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
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* Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_I2C_ARM_SBCON_H
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#define HW_I2C_ARM_SBCON_H
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#include "hw/sysbus.h"
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#include "hw/i2c/bitbang_i2c.h"
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#define TYPE_VERSATILE_I2C "versatile_i2c"
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#define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C
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#define ARM_SBCON_I2C(obj) \
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OBJECT_CHECK(ArmSbconI2CState, (obj), TYPE_ARM_SBCON_I2C)
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typedef struct ArmSbconI2CState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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bitbang_i2c_interface bitbang;
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int out;
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int in;
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} ArmSbconI2CState;
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#endif /* HW_I2C_ARM_SBCON_H */
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