fc70099621
The kernel had already support LSX and LASX [1], but QEMU is disable LSX/LASX for kvm. This patch adds kvm_check_cpucfg2() to check CPUCFG2. [1]: https://lore.kernel.org/all/CABgObfZHRf7E_7Jk4uPRmSyxTy3EiuuYwHC35jQncNL9s-zTDA@mail.gmail.com/ Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240122090206.1083584-1-gaosong@loongson.cn>
110 lines
2.7 KiB
C
110 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Copyright (C) 2020-2023 Loongson Technology Corporation Limited
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*/
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#ifndef __UAPI_ASM_LOONGARCH_KVM_H
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#define __UAPI_ASM_LOONGARCH_KVM_H
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#include <linux/types.h>
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/*
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* KVM LoongArch specific structures and definitions.
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*
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* Some parts derived from the x86 version of this file.
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*/
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#define __KVM_HAVE_READONLY_MEM
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
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#define KVM_DIRTY_LOG_PAGE_OFFSET 64
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/*
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* for KVM_GET_REGS and KVM_SET_REGS
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*/
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struct kvm_regs {
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/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
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__u64 gpr[32];
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__u64 pc;
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};
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/*
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* for KVM_GET_FPU and KVM_SET_FPU
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*/
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struct kvm_fpu {
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__u32 fcsr;
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__u64 fcc; /* 8x8 */
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struct kvm_fpureg {
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__u64 val64[4];
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} fpr[32];
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};
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/*
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* For LoongArch, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access various
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* registers. The id field is broken down as follows:
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*
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* bits[63..52] - As per linux/kvm.h
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* bits[51..32] - Must be zero.
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* bits[31..16] - Register set.
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*
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* Register set = 0: GP registers from kvm_regs (see definitions below).
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*
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* Register set = 1: CSR registers.
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*
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* Register set = 2: KVM specific registers (see definitions below).
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*
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* Register set = 3: FPU / SIMD registers (see definitions below).
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*
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* Other sets registers may be added in the future. Each set would
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* have its own identifier in bits[31..16].
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*/
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#define KVM_REG_LOONGARCH_GPR (KVM_REG_LOONGARCH | 0x00000ULL)
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#define KVM_REG_LOONGARCH_CSR (KVM_REG_LOONGARCH | 0x10000ULL)
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#define KVM_REG_LOONGARCH_KVM (KVM_REG_LOONGARCH | 0x20000ULL)
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#define KVM_REG_LOONGARCH_FPSIMD (KVM_REG_LOONGARCH | 0x30000ULL)
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#define KVM_REG_LOONGARCH_CPUCFG (KVM_REG_LOONGARCH | 0x40000ULL)
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#define KVM_REG_LOONGARCH_MASK (KVM_REG_LOONGARCH | 0x70000ULL)
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#define KVM_CSR_IDX_MASK 0x7fff
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#define KVM_CPUCFG_IDX_MASK 0x7fff
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/*
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* KVM_REG_LOONGARCH_KVM - KVM specific control registers.
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*/
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#define KVM_REG_LOONGARCH_COUNTER (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 1)
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#define KVM_REG_LOONGARCH_VCPU_RESET (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 2)
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#define LOONGARCH_REG_SHIFT 3
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#define LOONGARCH_REG_64(TYPE, REG) (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT))
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#define KVM_IOC_CSRID(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG)
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#define KVM_IOC_CPUCFG(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG)
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#define KVM_LOONGARCH_VCPU_CPUCFG 0
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struct kvm_debug_exit_arch {
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};
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/* for KVM_SET_GUEST_DEBUG */
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struct kvm_guest_debug_arch {
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};
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/* definition of registers in kvm_run */
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struct kvm_sync_regs {
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};
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/* dummy definition */
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struct kvm_sregs {
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};
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struct kvm_iocsr_entry {
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__u32 addr;
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__u32 pad;
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__u64 data;
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};
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#define KVM_NR_IRQCHIPS 1
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#define KVM_IRQCHIP_NUM_PINS 64
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#define KVM_MAX_CORES 256
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#endif /* __UAPI_ASM_LOONGARCH_KVM_H */
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