qemu-e2k/target-mips
Maciej W. Rozycki 1d725ae952 target-mips: Also apply the CP0.Status mask to MTTC0
Make CP0.Status writes made with the MTTC0 instruction respect this
register's mask just like all the other places.  Also preserve the
current values of masked out bits.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-12-16 12:45:20 +00:00
..
cpu-qom.h target-mips: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu.c gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag 2014-10-06 14:25:43 +01:00
cpu.h target-mips: Correct 32-bit address space wrapping 2014-12-16 12:45:20 +00:00
dsp_helper.c target-mips/dsp_helper.c: Add ifdef guards around various functions 2014-10-14 13:29:14 +01:00
gdbstub.c target-mips: gdbstub: Clean up FPU register handling 2014-12-16 12:45:20 +00:00
helper.c target-mips: Tighten ISA level checks 2014-12-16 12:45:20 +00:00
helper.h target-mips: Fix CP0.Config3.ISAOnExc write accesses 2014-12-16 12:45:20 +00:00
kvm_mips.h target-mips: kvm: Add main KVM support for MIPS 2014-06-18 16:58:52 +02:00
kvm.c target-mips: kvm: do not use get_clock() 2014-12-15 12:21:01 +01:00
lmi_helper.c
machine.c target-mips: update cpu_save/cpu_load to support new registers 2014-11-03 11:48:34 +00:00
Makefile.objs target-mips: add msa_helper.c 2014-11-03 11:48:35 +00:00
mips-defs.h target-mips: add MSA defines and data structure 2014-11-03 11:48:35 +00:00
msa_helper.c target-mips: add MSA 2RF format instructions 2014-11-03 11:48:35 +00:00
op_helper.c target-mips: Also apply the CP0.Status mask to MTTC0 2014-12-16 12:45:20 +00:00
TODO
translate_init.c target-mips: Fix formatting in `mips_defs' 2014-12-16 12:45:19 +00:00
translate.c target-mips: Correct 32-bit address space wrapping 2014-12-16 12:45:20 +00:00