Richard Henderson 645e3a812a tcg: Remove DEBUG_DISAS ... This had been set since the beginning, is never undefined, and it would seem to be harmful to debugging to do so. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2023-05-23 18:54:55 -07:00
..
alpha	target/alpha: Use MO_ALIGN where required	2023-05-05 17:05:58 +01:00
arm	accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu	2023-05-23 18:54:28 -07:00
avr	target/avr: Finish conversion to tcg_gen_qemu_{ld,st}_*	2023-05-05 17:05:28 +01:00
cris	target/cris: Finish conversion to tcg_gen_qemu_{ld,st}_*	2023-05-05 17:05:28 +01:00
hexagon	Hexagon (gdbstub): add HVX support	2023-05-18 12:40:52 -07:00
hppa	target/hppa: Use MO_ALIGN for system UNALIGN()	2023-05-05 17:05:58 +01:00
i386	target/i386: Fix exception classes for MOVNTPS/MOVNTPD.	2023-05-18 08:53:50 +02:00
loongarch	target/loongarch: Do not include tcg-ldst.h	2023-05-11 09:53:41 +01:00
m68k	target/m68k: Fix gen_load_fp for OS_LONG	2023-05-11 09:49:25 +01:00
microblaze	target/microblaze: Remove NB_MMU_MODES define	2023-03-13 06:44:37 -07:00
mips	target/mips: Use MO_ALIGN instead of 0	2023-05-11 09:53:41 +01:00
nios2	target/nios2: Remove TARGET_ALIGNED_ONLY	2023-05-11 09:53:41 +01:00
openrisc	target/openrisc: Setup FPU for detecting tininess before rounding	2023-05-11 15:40:28 +01:00
ppc	target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ	2023-05-23 16:51:19 -07:00
riscv	target/riscv: add Ventana's Veyron V1 CPU	2023-05-05 10:49:50 +10:00
rx	target/rx: Avoid tcg_const_i32	2023-03-13 06:44:37 -07:00
s390x	qemu/atomic128: Split atomic16_read	2023-05-23 18:54:55 -07:00
sh4	tcg: Remove DEBUG_DISAS	2023-05-23 18:54:55 -07:00
sparc	tcg: Remove DEBUG_DISAS	2023-05-23 18:54:55 -07:00
tricore	target/tricore: Use min/max for saturate	2023-03-13 07:03:39 -07:00
xtensa	target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_*	2023-05-05 17:05:29 +01:00
Kconfig
meson.build