Richard Henderson 1da8de39a3 util: Enhance flush_icache_range with separate data pointer ... We are shortly going to have a split rw/rx jit buffer. Depending on the host, we need to flush the dcache at the rw data pointer and flush the icache at the rx code pointer. For now, the two passed pointers are identical, so there is no effective change in behaviour. Reviewed-by: Joelle van Dyne <j@getutm.app> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2021-01-07 05:09:41 -10:00
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tcg-target.c.inc	util: Enhance flush_icache_range with separate data pointer	2021-01-07 05:09:41 -10:00
tcg-target.h	tcg: Introduce INDEX_op_qemu_st8_i32	2021-01-07 05:09:06 -10:00
tcg-target.opc.h	tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec	2020-06-02 08:42:37 -07:00