5de6f3c0f4
Update our copy of libvixl to upstream's 1.12 release. The major benefit from QEMU's point of view is that some instructions previously disassembled as "unimplemented (System)" are now displayed as something more useful. It also fixes some warnings about format strings that newer w64-mingw32 compilers were emitting. We didn't have any local changes to libvixl so nothing needed to be forward-ported. Although this is a large commit (due to upstream renaming most of the files), only a few of the files changed in this commit are not just straight copies of upstream libvixl files: disas/arm-a64.cc disas/libvixl/Makefile.objs disas/libvixl/README Note that this commit introduces some signed-unsigned comparison warnings on the old mingw compilers. Those compilers have broken TLS support anyway so have only ever been much use for compile tests; anybody still using them should add -Wno-sign-compare to their --extra-cflags. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
878 lines
28 KiB
C++
878 lines
28 KiB
C++
// Copyright 2014, ARM Limited
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// * Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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// * Neither the name of ARM Limited nor the names of its contributors may be
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// used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
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// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include "vixl/globals.h"
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#include "vixl/utils.h"
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#include "vixl/a64/decoder-a64.h"
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namespace vixl {
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void Decoder::DecodeInstruction(const Instruction *instr) {
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if (instr->Bits(28, 27) == 0) {
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VisitUnallocated(instr);
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} else {
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switch (instr->Bits(27, 24)) {
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// 0: PC relative addressing.
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case 0x0: DecodePCRelAddressing(instr); break;
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// 1: Add/sub immediate.
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case 0x1: DecodeAddSubImmediate(instr); break;
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// A: Logical shifted register.
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// Add/sub with carry.
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// Conditional compare register.
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// Conditional compare immediate.
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// Conditional select.
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// Data processing 1 source.
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// Data processing 2 source.
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// B: Add/sub shifted register.
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// Add/sub extended register.
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// Data processing 3 source.
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case 0xA:
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case 0xB: DecodeDataProcessing(instr); break;
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// 2: Logical immediate.
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// Move wide immediate.
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case 0x2: DecodeLogical(instr); break;
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// 3: Bitfield.
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// Extract.
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case 0x3: DecodeBitfieldExtract(instr); break;
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// 4: Unconditional branch immediate.
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// Exception generation.
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// Compare and branch immediate.
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// 5: Compare and branch immediate.
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// Conditional branch.
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// System.
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// 6,7: Unconditional branch.
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// Test and branch immediate.
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case 0x4:
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case 0x5:
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case 0x6:
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case 0x7: DecodeBranchSystemException(instr); break;
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// 8,9: Load/store register pair post-index.
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// Load register literal.
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// Load/store register unscaled immediate.
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// Load/store register immediate post-index.
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// Load/store register immediate pre-index.
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// Load/store register offset.
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// Load/store exclusive.
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// C,D: Load/store register pair offset.
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// Load/store register pair pre-index.
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// Load/store register unsigned immediate.
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// Advanced SIMD.
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case 0x8:
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case 0x9:
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case 0xC:
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case 0xD: DecodeLoadStore(instr); break;
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// E: FP fixed point conversion.
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// FP integer conversion.
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// FP data processing 1 source.
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// FP compare.
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// FP immediate.
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// FP data processing 2 source.
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// FP conditional compare.
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// FP conditional select.
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// Advanced SIMD.
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// F: FP data processing 3 source.
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// Advanced SIMD.
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case 0xE:
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case 0xF: DecodeFP(instr); break;
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}
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}
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}
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void Decoder::AppendVisitor(DecoderVisitor* new_visitor) {
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visitors_.push_back(new_visitor);
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}
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void Decoder::PrependVisitor(DecoderVisitor* new_visitor) {
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visitors_.push_front(new_visitor);
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}
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void Decoder::InsertVisitorBefore(DecoderVisitor* new_visitor,
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DecoderVisitor* registered_visitor) {
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std::list<DecoderVisitor*>::iterator it;
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for (it = visitors_.begin(); it != visitors_.end(); it++) {
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if (*it == registered_visitor) {
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visitors_.insert(it, new_visitor);
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return;
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}
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}
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// We reached the end of the list. The last element must be
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// registered_visitor.
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VIXL_ASSERT(*it == registered_visitor);
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visitors_.insert(it, new_visitor);
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}
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void Decoder::InsertVisitorAfter(DecoderVisitor* new_visitor,
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DecoderVisitor* registered_visitor) {
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std::list<DecoderVisitor*>::iterator it;
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for (it = visitors_.begin(); it != visitors_.end(); it++) {
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if (*it == registered_visitor) {
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it++;
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visitors_.insert(it, new_visitor);
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return;
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}
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}
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// We reached the end of the list. The last element must be
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// registered_visitor.
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VIXL_ASSERT(*it == registered_visitor);
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visitors_.push_back(new_visitor);
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}
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void Decoder::RemoveVisitor(DecoderVisitor* visitor) {
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visitors_.remove(visitor);
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}
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void Decoder::DecodePCRelAddressing(const Instruction* instr) {
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VIXL_ASSERT(instr->Bits(27, 24) == 0x0);
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// We know bit 28 is set, as <b28:b27> = 0 is filtered out at the top level
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// decode.
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VIXL_ASSERT(instr->Bit(28) == 0x1);
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VisitPCRelAddressing(instr);
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}
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void Decoder::DecodeBranchSystemException(const Instruction* instr) {
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VIXL_ASSERT((instr->Bits(27, 24) == 0x4) ||
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(instr->Bits(27, 24) == 0x5) ||
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(instr->Bits(27, 24) == 0x6) ||
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(instr->Bits(27, 24) == 0x7) );
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switch (instr->Bits(31, 29)) {
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case 0:
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case 4: {
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VisitUnconditionalBranch(instr);
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break;
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}
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case 1:
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case 5: {
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if (instr->Bit(25) == 0) {
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VisitCompareBranch(instr);
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} else {
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VisitTestBranch(instr);
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}
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break;
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}
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case 2: {
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if (instr->Bit(25) == 0) {
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if ((instr->Bit(24) == 0x1) ||
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(instr->Mask(0x01000010) == 0x00000010)) {
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VisitUnallocated(instr);
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} else {
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VisitConditionalBranch(instr);
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}
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} else {
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VisitUnallocated(instr);
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}
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break;
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}
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case 6: {
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if (instr->Bit(25) == 0) {
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if (instr->Bit(24) == 0) {
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if ((instr->Bits(4, 2) != 0) ||
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(instr->Mask(0x00E0001D) == 0x00200001) ||
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(instr->Mask(0x00E0001D) == 0x00400001) ||
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(instr->Mask(0x00E0001E) == 0x00200002) ||
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(instr->Mask(0x00E0001E) == 0x00400002) ||
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(instr->Mask(0x00E0001C) == 0x00600000) ||
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(instr->Mask(0x00E0001C) == 0x00800000) ||
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(instr->Mask(0x00E0001F) == 0x00A00000) ||
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(instr->Mask(0x00C0001C) == 0x00C00000)) {
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VisitUnallocated(instr);
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} else {
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VisitException(instr);
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}
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} else {
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if (instr->Bits(23, 22) == 0) {
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const Instr masked_003FF0E0 = instr->Mask(0x003FF0E0);
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if ((instr->Bits(21, 19) == 0x4) ||
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(masked_003FF0E0 == 0x00033000) ||
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(masked_003FF0E0 == 0x003FF020) ||
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(masked_003FF0E0 == 0x003FF060) ||
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(masked_003FF0E0 == 0x003FF0E0) ||
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(instr->Mask(0x00388000) == 0x00008000) ||
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(instr->Mask(0x0038E000) == 0x00000000) ||
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(instr->Mask(0x0039E000) == 0x00002000) ||
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(instr->Mask(0x003AE000) == 0x00002000) ||
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(instr->Mask(0x003CE000) == 0x00042000) ||
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(instr->Mask(0x003FFFC0) == 0x000320C0) ||
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(instr->Mask(0x003FF100) == 0x00032100) ||
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(instr->Mask(0x003FF200) == 0x00032200) ||
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(instr->Mask(0x003FF400) == 0x00032400) ||
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(instr->Mask(0x003FF800) == 0x00032800) ||
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(instr->Mask(0x0038F000) == 0x00005000) ||
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(instr->Mask(0x0038E000) == 0x00006000)) {
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VisitUnallocated(instr);
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} else {
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VisitSystem(instr);
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}
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} else {
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VisitUnallocated(instr);
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}
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}
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} else {
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if ((instr->Bit(24) == 0x1) ||
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(instr->Bits(20, 16) != 0x1F) ||
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(instr->Bits(15, 10) != 0) ||
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(instr->Bits(4, 0) != 0) ||
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(instr->Bits(24, 21) == 0x3) ||
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(instr->Bits(24, 22) == 0x3)) {
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VisitUnallocated(instr);
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} else {
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VisitUnconditionalBranchToRegister(instr);
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}
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}
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break;
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}
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case 3:
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case 7: {
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VisitUnallocated(instr);
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break;
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}
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}
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}
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void Decoder::DecodeLoadStore(const Instruction* instr) {
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VIXL_ASSERT((instr->Bits(27, 24) == 0x8) ||
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(instr->Bits(27, 24) == 0x9) ||
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(instr->Bits(27, 24) == 0xC) ||
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(instr->Bits(27, 24) == 0xD) );
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// TODO(all): rearrange the tree to integrate this branch.
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if ((instr->Bit(28) == 0) && (instr->Bit(29) == 0) && (instr->Bit(26) == 1)) {
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DecodeNEONLoadStore(instr);
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return;
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}
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if (instr->Bit(24) == 0) {
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if (instr->Bit(28) == 0) {
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if (instr->Bit(29) == 0) {
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if (instr->Bit(26) == 0) {
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VisitLoadStoreExclusive(instr);
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} else {
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VIXL_UNREACHABLE();
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}
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} else {
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if ((instr->Bits(31, 30) == 0x3) ||
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(instr->Mask(0xC4400000) == 0x40000000)) {
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VisitUnallocated(instr);
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} else {
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if (instr->Bit(23) == 0) {
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if (instr->Mask(0xC4400000) == 0xC0400000) {
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VisitUnallocated(instr);
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} else {
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VisitLoadStorePairNonTemporal(instr);
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}
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} else {
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VisitLoadStorePairPostIndex(instr);
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}
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}
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}
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} else {
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if (instr->Bit(29) == 0) {
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if (instr->Mask(0xC4000000) == 0xC4000000) {
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VisitUnallocated(instr);
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} else {
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VisitLoadLiteral(instr);
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}
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} else {
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if ((instr->Mask(0x84C00000) == 0x80C00000) ||
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(instr->Mask(0x44800000) == 0x44800000) ||
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(instr->Mask(0x84800000) == 0x84800000)) {
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VisitUnallocated(instr);
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} else {
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if (instr->Bit(21) == 0) {
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switch (instr->Bits(11, 10)) {
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case 0: {
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VisitLoadStoreUnscaledOffset(instr);
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break;
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}
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case 1: {
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if (instr->Mask(0xC4C00000) == 0xC0800000) {
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VisitUnallocated(instr);
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} else {
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VisitLoadStorePostIndex(instr);
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}
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break;
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}
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case 2: {
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// TODO: VisitLoadStoreRegisterOffsetUnpriv.
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VisitUnimplemented(instr);
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break;
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}
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case 3: {
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if (instr->Mask(0xC4C00000) == 0xC0800000) {
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VisitUnallocated(instr);
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} else {
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VisitLoadStorePreIndex(instr);
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}
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break;
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}
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}
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} else {
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if (instr->Bits(11, 10) == 0x2) {
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if (instr->Bit(14) == 0) {
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VisitUnallocated(instr);
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} else {
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VisitLoadStoreRegisterOffset(instr);
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}
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} else {
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VisitUnallocated(instr);
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}
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}
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}
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}
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}
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} else {
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if (instr->Bit(28) == 0) {
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if (instr->Bit(29) == 0) {
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VisitUnallocated(instr);
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} else {
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if ((instr->Bits(31, 30) == 0x3) ||
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(instr->Mask(0xC4400000) == 0x40000000)) {
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VisitUnallocated(instr);
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} else {
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if (instr->Bit(23) == 0) {
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VisitLoadStorePairOffset(instr);
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} else {
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VisitLoadStorePairPreIndex(instr);
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}
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}
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}
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} else {
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if (instr->Bit(29) == 0) {
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VisitUnallocated(instr);
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} else {
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if ((instr->Mask(0x84C00000) == 0x80C00000) ||
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(instr->Mask(0x44800000) == 0x44800000) ||
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(instr->Mask(0x84800000) == 0x84800000)) {
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VisitUnallocated(instr);
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} else {
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VisitLoadStoreUnsignedOffset(instr);
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}
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}
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}
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}
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}
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void Decoder::DecodeLogical(const Instruction* instr) {
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VIXL_ASSERT(instr->Bits(27, 24) == 0x2);
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if (instr->Mask(0x80400000) == 0x00400000) {
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VisitUnallocated(instr);
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} else {
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if (instr->Bit(23) == 0) {
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VisitLogicalImmediate(instr);
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} else {
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if (instr->Bits(30, 29) == 0x1) {
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VisitUnallocated(instr);
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} else {
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VisitMoveWideImmediate(instr);
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}
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}
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}
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}
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void Decoder::DecodeBitfieldExtract(const Instruction* instr) {
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VIXL_ASSERT(instr->Bits(27, 24) == 0x3);
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if ((instr->Mask(0x80400000) == 0x80000000) ||
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(instr->Mask(0x80400000) == 0x00400000) ||
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(instr->Mask(0x80008000) == 0x00008000)) {
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VisitUnallocated(instr);
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} else if (instr->Bit(23) == 0) {
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if ((instr->Mask(0x80200000) == 0x00200000) ||
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(instr->Mask(0x60000000) == 0x60000000)) {
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VisitUnallocated(instr);
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} else {
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VisitBitfield(instr);
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}
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} else {
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if ((instr->Mask(0x60200000) == 0x00200000) ||
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(instr->Mask(0x60000000) != 0x00000000)) {
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VisitUnallocated(instr);
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} else {
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VisitExtract(instr);
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}
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}
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}
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void Decoder::DecodeAddSubImmediate(const Instruction* instr) {
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VIXL_ASSERT(instr->Bits(27, 24) == 0x1);
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if (instr->Bit(23) == 1) {
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VisitUnallocated(instr);
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} else {
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VisitAddSubImmediate(instr);
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}
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}
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void Decoder::DecodeDataProcessing(const Instruction* instr) {
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VIXL_ASSERT((instr->Bits(27, 24) == 0xA) ||
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(instr->Bits(27, 24) == 0xB));
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if (instr->Bit(24) == 0) {
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if (instr->Bit(28) == 0) {
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if (instr->Mask(0x80008000) == 0x00008000) {
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VisitUnallocated(instr);
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} else {
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VisitLogicalShifted(instr);
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}
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} else {
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switch (instr->Bits(23, 21)) {
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case 0: {
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if (instr->Mask(0x0000FC00) != 0) {
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VisitUnallocated(instr);
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} else {
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VisitAddSubWithCarry(instr);
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}
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break;
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}
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case 2: {
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if ((instr->Bit(29) == 0) ||
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(instr->Mask(0x00000410) != 0)) {
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VisitUnallocated(instr);
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} else {
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if (instr->Bit(11) == 0) {
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VisitConditionalCompareRegister(instr);
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} else {
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VisitConditionalCompareImmediate(instr);
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}
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}
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break;
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}
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case 4: {
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if (instr->Mask(0x20000800) != 0x00000000) {
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VisitUnallocated(instr);
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} else {
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VisitConditionalSelect(instr);
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}
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break;
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}
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case 6: {
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if (instr->Bit(29) == 0x1) {
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VisitUnallocated(instr);
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VIXL_FALLTHROUGH();
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} else {
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if (instr->Bit(30) == 0) {
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if ((instr->Bit(15) == 0x1) ||
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(instr->Bits(15, 11) == 0) ||
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(instr->Bits(15, 12) == 0x1) ||
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(instr->Bits(15, 12) == 0x3) ||
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(instr->Bits(15, 13) == 0x3) ||
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(instr->Mask(0x8000EC00) == 0x00004C00) ||
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(instr->Mask(0x8000E800) == 0x80004000) ||
|
|
(instr->Mask(0x8000E400) == 0x80004000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitDataProcessing2Source(instr);
|
|
}
|
|
} else {
|
|
if ((instr->Bit(13) == 1) ||
|
|
(instr->Bits(20, 16) != 0) ||
|
|
(instr->Bits(15, 14) != 0) ||
|
|
(instr->Mask(0xA01FFC00) == 0x00000C00) ||
|
|
(instr->Mask(0x201FF800) == 0x00001800)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitDataProcessing1Source(instr);
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
case 1:
|
|
case 3:
|
|
case 5:
|
|
case 7: VisitUnallocated(instr); break;
|
|
}
|
|
}
|
|
} else {
|
|
if (instr->Bit(28) == 0) {
|
|
if (instr->Bit(21) == 0) {
|
|
if ((instr->Bits(23, 22) == 0x3) ||
|
|
(instr->Mask(0x80008000) == 0x00008000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitAddSubShifted(instr);
|
|
}
|
|
} else {
|
|
if ((instr->Mask(0x00C00000) != 0x00000000) ||
|
|
(instr->Mask(0x00001400) == 0x00001400) ||
|
|
(instr->Mask(0x00001800) == 0x00001800)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitAddSubExtended(instr);
|
|
}
|
|
}
|
|
} else {
|
|
if ((instr->Bit(30) == 0x1) ||
|
|
(instr->Bits(30, 29) == 0x1) ||
|
|
(instr->Mask(0xE0600000) == 0x00200000) ||
|
|
(instr->Mask(0xE0608000) == 0x00400000) ||
|
|
(instr->Mask(0x60608000) == 0x00408000) ||
|
|
(instr->Mask(0x60E00000) == 0x00E00000) ||
|
|
(instr->Mask(0x60E00000) == 0x00800000) ||
|
|
(instr->Mask(0x60E00000) == 0x00600000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitDataProcessing3Source(instr);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void Decoder::DecodeFP(const Instruction* instr) {
|
|
VIXL_ASSERT((instr->Bits(27, 24) == 0xE) ||
|
|
(instr->Bits(27, 24) == 0xF));
|
|
if (instr->Bit(28) == 0) {
|
|
DecodeNEONVectorDataProcessing(instr);
|
|
} else {
|
|
if (instr->Bits(31, 30) == 0x3) {
|
|
VisitUnallocated(instr);
|
|
} else if (instr->Bits(31, 30) == 0x1) {
|
|
DecodeNEONScalarDataProcessing(instr);
|
|
} else {
|
|
if (instr->Bit(29) == 0) {
|
|
if (instr->Bit(24) == 0) {
|
|
if (instr->Bit(21) == 0) {
|
|
if ((instr->Bit(23) == 1) ||
|
|
(instr->Bit(18) == 1) ||
|
|
(instr->Mask(0x80008000) == 0x00000000) ||
|
|
(instr->Mask(0x000E0000) == 0x00000000) ||
|
|
(instr->Mask(0x000E0000) == 0x000A0000) ||
|
|
(instr->Mask(0x00160000) == 0x00000000) ||
|
|
(instr->Mask(0x00160000) == 0x00120000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitFPFixedPointConvert(instr);
|
|
}
|
|
} else {
|
|
if (instr->Bits(15, 10) == 32) {
|
|
VisitUnallocated(instr);
|
|
} else if (instr->Bits(15, 10) == 0) {
|
|
if ((instr->Bits(23, 22) == 0x3) ||
|
|
(instr->Mask(0x000E0000) == 0x000A0000) ||
|
|
(instr->Mask(0x000E0000) == 0x000C0000) ||
|
|
(instr->Mask(0x00160000) == 0x00120000) ||
|
|
(instr->Mask(0x00160000) == 0x00140000) ||
|
|
(instr->Mask(0x20C40000) == 0x00800000) ||
|
|
(instr->Mask(0x20C60000) == 0x00840000) ||
|
|
(instr->Mask(0xA0C60000) == 0x80060000) ||
|
|
(instr->Mask(0xA0C60000) == 0x00860000) ||
|
|
(instr->Mask(0xA0C60000) == 0x00460000) ||
|
|
(instr->Mask(0xA0CE0000) == 0x80860000) ||
|
|
(instr->Mask(0xA0CE0000) == 0x804E0000) ||
|
|
(instr->Mask(0xA0CE0000) == 0x000E0000) ||
|
|
(instr->Mask(0xA0D60000) == 0x00160000) ||
|
|
(instr->Mask(0xA0D60000) == 0x80560000) ||
|
|
(instr->Mask(0xA0D60000) == 0x80960000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitFPIntegerConvert(instr);
|
|
}
|
|
} else if (instr->Bits(14, 10) == 16) {
|
|
const Instr masked_A0DF8000 = instr->Mask(0xA0DF8000);
|
|
if ((instr->Mask(0x80180000) != 0) ||
|
|
(masked_A0DF8000 == 0x00020000) ||
|
|
(masked_A0DF8000 == 0x00030000) ||
|
|
(masked_A0DF8000 == 0x00068000) ||
|
|
(masked_A0DF8000 == 0x00428000) ||
|
|
(masked_A0DF8000 == 0x00430000) ||
|
|
(masked_A0DF8000 == 0x00468000) ||
|
|
(instr->Mask(0xA0D80000) == 0x00800000) ||
|
|
(instr->Mask(0xA0DE0000) == 0x00C00000) ||
|
|
(instr->Mask(0xA0DF0000) == 0x00C30000) ||
|
|
(instr->Mask(0xA0DC0000) == 0x00C40000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitFPDataProcessing1Source(instr);
|
|
}
|
|
} else if (instr->Bits(13, 10) == 8) {
|
|
if ((instr->Bits(15, 14) != 0) ||
|
|
(instr->Bits(2, 0) != 0) ||
|
|
(instr->Mask(0x80800000) != 0x00000000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitFPCompare(instr);
|
|
}
|
|
} else if (instr->Bits(12, 10) == 4) {
|
|
if ((instr->Bits(9, 5) != 0) ||
|
|
(instr->Mask(0x80800000) != 0x00000000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitFPImmediate(instr);
|
|
}
|
|
} else {
|
|
if (instr->Mask(0x80800000) != 0x00000000) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
switch (instr->Bits(11, 10)) {
|
|
case 1: {
|
|
VisitFPConditionalCompare(instr);
|
|
break;
|
|
}
|
|
case 2: {
|
|
if ((instr->Bits(15, 14) == 0x3) ||
|
|
(instr->Mask(0x00009000) == 0x00009000) ||
|
|
(instr->Mask(0x0000A000) == 0x0000A000)) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitFPDataProcessing2Source(instr);
|
|
}
|
|
break;
|
|
}
|
|
case 3: {
|
|
VisitFPConditionalSelect(instr);
|
|
break;
|
|
}
|
|
default: VIXL_UNREACHABLE();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
} else {
|
|
// Bit 30 == 1 has been handled earlier.
|
|
VIXL_ASSERT(instr->Bit(30) == 0);
|
|
if (instr->Mask(0xA0800000) != 0) {
|
|
VisitUnallocated(instr);
|
|
} else {
|
|
VisitFPDataProcessing3Source(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void Decoder::DecodeNEONLoadStore(const Instruction* instr) {
|
|
VIXL_ASSERT(instr->Bits(29, 25) == 0x6);
|
|
if (instr->Bit(31) == 0) {
|
|
if ((instr->Bit(24) == 0) && (instr->Bit(21) == 1)) {
|
|
VisitUnallocated(instr);
|
|
return;
|
|
}
|
|
|
|
if (instr->Bit(23) == 0) {
|
|
if (instr->Bits(20, 16) == 0) {
|
|
if (instr->Bit(24) == 0) {
|
|
VisitNEONLoadStoreMultiStruct(instr);
|
|
} else {
|
|
VisitNEONLoadStoreSingleStruct(instr);
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
} else {
|
|
if (instr->Bit(24) == 0) {
|
|
VisitNEONLoadStoreMultiStructPostIndex(instr);
|
|
} else {
|
|
VisitNEONLoadStoreSingleStructPostIndex(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
|
|
|
|
void Decoder::DecodeNEONVectorDataProcessing(const Instruction* instr) {
|
|
VIXL_ASSERT(instr->Bits(28, 25) == 0x7);
|
|
if (instr->Bit(31) == 0) {
|
|
if (instr->Bit(24) == 0) {
|
|
if (instr->Bit(21) == 0) {
|
|
if (instr->Bit(15) == 0) {
|
|
if (instr->Bit(10) == 0) {
|
|
if (instr->Bit(29) == 0) {
|
|
if (instr->Bit(11) == 0) {
|
|
VisitNEONTable(instr);
|
|
} else {
|
|
VisitNEONPerm(instr);
|
|
}
|
|
} else {
|
|
VisitNEONExtract(instr);
|
|
}
|
|
} else {
|
|
if (instr->Bits(23, 22) == 0) {
|
|
VisitNEONCopy(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
} else {
|
|
if (instr->Bit(10) == 0) {
|
|
if (instr->Bit(11) == 0) {
|
|
VisitNEON3Different(instr);
|
|
} else {
|
|
if (instr->Bits(18, 17) == 0) {
|
|
if (instr->Bit(20) == 0) {
|
|
if (instr->Bit(19) == 0) {
|
|
VisitNEON2RegMisc(instr);
|
|
} else {
|
|
if (instr->Bits(30, 29) == 0x2) {
|
|
VisitCryptoAES(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
if (instr->Bit(19) == 0) {
|
|
VisitNEONAcrossLanes(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitNEON3Same(instr);
|
|
}
|
|
}
|
|
} else {
|
|
if (instr->Bit(10) == 0) {
|
|
VisitNEONByIndexedElement(instr);
|
|
} else {
|
|
if (instr->Bit(23) == 0) {
|
|
if (instr->Bits(22, 19) == 0) {
|
|
VisitNEONModifiedImmediate(instr);
|
|
} else {
|
|
VisitNEONShiftImmediate(instr);
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
|
|
|
|
void Decoder::DecodeNEONScalarDataProcessing(const Instruction* instr) {
|
|
VIXL_ASSERT(instr->Bits(28, 25) == 0xF);
|
|
if (instr->Bit(24) == 0) {
|
|
if (instr->Bit(21) == 0) {
|
|
if (instr->Bit(15) == 0) {
|
|
if (instr->Bit(10) == 0) {
|
|
if (instr->Bit(29) == 0) {
|
|
if (instr->Bit(11) == 0) {
|
|
VisitCrypto3RegSHA(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
} else {
|
|
if (instr->Bits(23, 22) == 0) {
|
|
VisitNEONScalarCopy(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
} else {
|
|
if (instr->Bit(10) == 0) {
|
|
if (instr->Bit(11) == 0) {
|
|
VisitNEONScalar3Diff(instr);
|
|
} else {
|
|
if (instr->Bits(18, 17) == 0) {
|
|
if (instr->Bit(20) == 0) {
|
|
if (instr->Bit(19) == 0) {
|
|
VisitNEONScalar2RegMisc(instr);
|
|
} else {
|
|
if (instr->Bit(29) == 0) {
|
|
VisitCrypto2RegSHA(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
if (instr->Bit(19) == 0) {
|
|
VisitNEONScalarPairwise(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
} else {
|
|
VisitNEONScalar3Same(instr);
|
|
}
|
|
}
|
|
} else {
|
|
if (instr->Bit(10) == 0) {
|
|
VisitNEONScalarByIndexedElement(instr);
|
|
} else {
|
|
if (instr->Bit(23) == 0) {
|
|
VisitNEONScalarShiftImmediate(instr);
|
|
} else {
|
|
VisitUnallocated(instr);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
#define DEFINE_VISITOR_CALLERS(A) \
|
|
void Decoder::Visit##A(const Instruction *instr) { \
|
|
VIXL_ASSERT(instr->Mask(A##FMask) == A##Fixed); \
|
|
std::list<DecoderVisitor*>::iterator it; \
|
|
for (it = visitors_.begin(); it != visitors_.end(); it++) { \
|
|
(*it)->Visit##A(instr); \
|
|
} \
|
|
}
|
|
VISITOR_LIST(DEFINE_VISITOR_CALLERS)
|
|
#undef DEFINE_VISITOR_CALLERS
|
|
} // namespace vixl
|