qemu-e2k/target-ppc
Tom Musta 1fa74845f2 target-ppc: Bug Fix: mullw
For 64-bit implementations, the mullw result is the 64 bit product
of the sign-extended least significant 32 bits of the source
registers.

Fix the code to properly sign extend the source operands and produce
a 64 bit product.

Example:
R3 00000000002F37A0
R4 41C33D242F816715
mullw 3,3,4
R3 expected : 0008C3146AE0F020
R3 actual   : 000000006AE0F020 (without this patch)

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-09-08 12:50:50 +02:00
..
arch_dump.c
cpu-models.c target-ppc: Remove POWER7+ and POWER8E families 2014-07-08 12:10:36 +02:00
cpu-models.h target-ppc: Add pvr_match() callback 2014-07-08 12:10:36 +02:00
cpu-qom.h spapr: Add support for new NMI interface 2014-08-25 13:25:16 +02:00
cpu.h
dfp_helper.c
excp_helper.c spapr: Add support for new NMI interface 2014-08-25 13:25:16 +02:00
fpu_helper.c
gdbstub.c target-ppc: Fix gdbstub for ppc64le-linux-user 2014-07-08 12:10:36 +02:00
helper_regs.h
helper.h
int_helper.c
kvm_ppc.c
kvm_ppc.h spapr: add uuid/host details to device tree 2014-09-08 12:50:47 +02:00
kvm-stub.c
kvm.c ppc: Add hw breakpoint watchpoint support 2014-09-08 12:50:49 +02:00
machine.c
Makefile.objs
mem_helper.c
mfrom_table_gen.c
mfrom_table.c
misc_helper.c
mmu_helper.c PPC: Fix booke206 TLB with phys addrs > 32bit 2014-07-08 12:10:36 +02:00
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c
mmu-hash64.h
STATUS
timebase_helper.c
translate_init.c target-ppc: Fix number of threads per core limit 2014-07-15 16:11:58 +02:00
translate.c target-ppc: Bug Fix: mullw 2014-09-08 12:50:50 +02:00
user_only_helper.c