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21f3f8db0e
qemu-e2k/hw/ppc
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Cédric Le Goater 21f3f8db0e ppc/xive: fix OV5_XIVE_EXPLOIT bits 
On POWER9, the Client Architecture Support (CAS) negotiation process
determines whether the guest operates in XIVE Legacy compatibility or
in XIVE exploitation mode. Now that we have initial guest support for
the XIVE interrupt controller, let's fix the bits definition which have
evolved in the latest specs.

The platform advertises the XIVE Exploitation Mode support using the
property "ibm,arch-vec-5-platform-support-vec-5", byte 23 bits 0-1 :

 - 0b00 XIVE legacy mode Only
 - 0b01 XIVE exploitation mode Only
 - 0b10 XIVE legacy or exploitation mode

The OS asks for XIVE Exploitation Mode support using the property
"ibm,architecture-vec-5", byte 23 bits 0-1:

 - 0b00 XIVE legacy mode Only
 - 0b01 XIVE exploitation mode Only

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-15 10:29:48 +10:00
..
e500-ccsr.h
e500.c e500: Use cpu_index instead of vcpu_dt_id 2017-09-08 09:30:55 +10:00
e500.h
e500plat.c
fdt.c
mac_newworld.c ppc: replace cpu_ppc_init() with cpu_generic_init() 2017-09-01 11:54:25 -03:00
mac_oldworld.c ppc: replace cpu_ppc_init() with cpu_generic_init() 2017-09-01 11:54:25 -03:00
mac.h
Makefile.objs ppc4xx_i2c: Move to hw/i2c 2017-09-08 09:30:55 +10:00
mpc8544_guts.c
mpc8544ds.c
pnv_bmc.c
pnv_core.c
pnv_lpc.c
pnv_occ.c
pnv_psi.c
pnv_xscom.c
pnv.c Convert error_report() to warn_report() 2017-07-13 13:49:58 +02:00
ppc4xx_devs.c ppc4xx: Make MAL emulation more generic 2017-09-08 09:30:55 +10:00
ppc4xx_pci.c
ppc405_boards.c hw: Use new memory_region_init_{ram, rom, rom_device}() functions 2017-07-14 17:59:42 +01:00
ppc405_uc.c ppc4xx: Export ECB and PLB emulation 2017-09-08 09:30:55 +10:00
ppc405.h ppc4xx: Export ECB and PLB emulation 2017-09-08 09:30:55 +10:00
ppc440_bamboo.c ppc: replace cpu_ppc_init() with cpu_generic_init() 2017-09-01 11:54:25 -03:00
ppc_booke.c
ppc.c ppc: spapr: Make VCPU ID handling private to SPAPR 2017-09-08 09:30:55 +10:00
ppce500_spin.c
prep_systemio.c
prep.c ppc: replace cpu_ppc_init() with cpu_generic_init() 2017-09-01 11:54:25 -03:00
rs6000_mc.c
spapr_cpu_core.c ppc: spapr: Move VCPU ID calculation into sPAPR 2017-09-08 09:30:55 +10:00
spapr_drc.c spapr_drc: pass object ownership to parent/owner 2017-09-08 09:30:54 +10:00
spapr_events.c hw/ppc: clear pending_events on machine reset 2017-09-08 09:30:54 +10:00
spapr_hcall.c spapr: only update SDR1 once per-cpu during CAS 2017-09-15 10:29:48 +10:00
spapr_iommu.c spapr_iommu: Realloc guest visible TCE table when hot(un)plugging vfio-pci 2017-09-08 09:30:55 +10:00
spapr_ovec.c
spapr_pci_vfio.c
spapr_pci.c spapr_pci: use g_strdup_printf() 2017-09-15 10:29:48 +10:00
spapr_rng.c spapr_rng: Convert to DEFINE_PROP_LINK 2017-07-14 12:04:43 +02:00
spapr_rtas_ddw.c
spapr_rtas.c ppc: spapr: Make VCPU ID handling private to SPAPR 2017-09-08 09:30:55 +10:00
spapr_rtc.c hw/ppc/spapr_rtc: Mark the RTC device with user_creatable = false 2017-08-22 21:26:46 +10:00
spapr_vio.c vmstate: error hint for failed equal checks 2017-06-28 11:18:44 +02:00
spapr.c ppc/xive: fix OV5_XIVE_EXPLOIT bits 2017-09-15 10:29:48 +10:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
virtex_ml507.c ppc: replace cpu_ppc_init() with cpu_generic_init() 2017-09-01 11:54:25 -03:00