344f4b1581
Implement the Arm TrustZone Memory Protection Controller, which sits in front of RAM and allows secure software to configure it to either pass through or reject transactions. We implement the MPC as a QEMU IOMMU, which will direct transactions either through to the devices and memory behind it or to a special "never works" AddressSpace if they are blocked. This initial commit implements the skeleton of the device: * it always permits accesses * it doesn't implement most of the registers * it doesn't implement the interrupt or other behaviour for blocked transactions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20180620132032.28865-2-peter.maydell@linaro.org
75 lines
2.4 KiB
Makefile
75 lines
2.4 KiB
Makefile
common-obj-$(CONFIG_APPLESMC) += applesmc.o
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common-obj-$(CONFIG_MAX111X) += max111x.o
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common-obj-$(CONFIG_TMP105) += tmp105.o
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common-obj-$(CONFIG_TMP421) += tmp421.o
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common-obj-$(CONFIG_ISA_DEBUG) += debugexit.o
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common-obj-$(CONFIG_SGA) += sga.o
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common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o
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common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o
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common-obj-$(CONFIG_EDU) += edu.o
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common-obj-$(CONFIG_PCA9552) += pca9552.o
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common-obj-y += unimp.o
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common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o
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# ARM devices
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common-obj-$(CONFIG_PL310) += arm_l2x0.o
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common-obj-$(CONFIG_INTEGRATOR_DEBUG) += arm_integrator_debug.o
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common-obj-$(CONFIG_A9SCU) += a9scu.o
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common-obj-$(CONFIG_ARM11SCU) += arm11scu.o
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# Mac devices
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common-obj-$(CONFIG_MOS6522) += mos6522.o
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# PKUnity SoC devices
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common-obj-$(CONFIG_PUV3) += puv3_pm.o
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common-obj-$(CONFIG_MACIO) += macio/
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obj-$(CONFIG_IVSHMEM_DEVICE) += ivshmem.o
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obj-$(CONFIG_REALVIEW) += arm_sysctl.o
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obj-$(CONFIG_NSERIES) += cbus.o
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obj-$(CONFIG_ECCMEMCTL) += eccmemctl.o
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obj-$(CONFIG_EXYNOS4) += exynos4210_pmu.o exynos4210_clk.o exynos4210_rng.o
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obj-$(CONFIG_IMX) += imx_ccm.o
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obj-$(CONFIG_IMX) += imx31_ccm.o
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obj-$(CONFIG_IMX) += imx25_ccm.o
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obj-$(CONFIG_IMX) += imx6_ccm.o
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obj-$(CONFIG_IMX) += imx6_src.o
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obj-$(CONFIG_IMX) += imx7_ccm.o
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obj-$(CONFIG_IMX) += imx2_wdt.o
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obj-$(CONFIG_IMX) += imx7_snvs.o
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obj-$(CONFIG_IMX) += imx7_gpr.o
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obj-$(CONFIG_MILKYMIST) += milkymist-hpdmc.o
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obj-$(CONFIG_MILKYMIST) += milkymist-pfpu.o
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obj-$(CONFIG_MAINSTONE) += mst_fpga.o
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obj-$(CONFIG_OMAP) += omap_clk.o
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obj-$(CONFIG_OMAP) += omap_gpmc.o
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obj-$(CONFIG_OMAP) += omap_l4.o
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obj-$(CONFIG_OMAP) += omap_sdrc.o
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obj-$(CONFIG_OMAP) += omap_tap.o
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obj-$(CONFIG_RASPI) += bcm2835_mbox.o
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obj-$(CONFIG_RASPI) += bcm2835_property.o
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obj-$(CONFIG_RASPI) += bcm2835_rng.o
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obj-$(CONFIG_SLAVIO) += slavio_misc.o
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obj-$(CONFIG_ZYNQ) += zynq_slcr.o
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obj-$(CONFIG_ZYNQ) += zynq-xadc.o
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obj-$(CONFIG_STM32F2XX_SYSCFG) += stm32f2xx_syscfg.o
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obj-$(CONFIG_MIPS_CPS) += mips_cmgcr.o
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obj-$(CONFIG_MIPS_CPS) += mips_cpc.o
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obj-$(CONFIG_MIPS_ITU) += mips_itu.o
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obj-$(CONFIG_MPS2_FPGAIO) += mps2-fpgaio.o
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obj-$(CONFIG_MPS2_SCC) += mps2-scc.o
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obj-$(CONFIG_TZ_MPC) += tz-mpc.o
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obj-$(CONFIG_TZ_PPC) += tz-ppc.o
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obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o
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obj-$(CONFIG_PVPANIC) += pvpanic.o
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obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
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obj-$(CONFIG_AUX) += auxbus.o
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obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
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obj-y += mmio_interface.o
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obj-$(CONFIG_MSF2) += msf2-sysreg.o
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