66577e9e1c
vhost-user support without ioeventfd word replacements in vhost user spec shpc improvements cleanups, fixes all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmQBO8QPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRpMUMH/3/FVp4qaF4CDwCHn7xWFRJpOREIhX/iWfUu lGkwxnB7Lfyqdg7i4CAfgMf2emWKZchEE2DamfCo5bIX0IgRU3DWcOdR9ePvJ29J cKwIYpxZcB4RYSoWL5OUakQLCT3JOu4XWaXeVjyHABjQhf3lGpwN4KmIOBGOy/N6 0YHOQScW2eW62wIOwhAEuYQceMt6KU32Uw3tLnMbJliiBf3a/hPctVNM9TFY9pcd UYHGfBx/zD45owf1lTVEQFDg0eqPZKWW29g5haiOd5oAyXHHolzu+bt3bU7lH46b f7iP12LqDudyrgoF5YWv3NJ4HaGm5V3kPqNqLLF/mjF7alxG+N8= =hN3h -----END PGP SIGNATURE----- Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging virtio,pc,pci: features, cleanups, fixes vhost-user support without ioeventfd word replacements in vhost user spec shpc improvements cleanups, fixes all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmQBO8QPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpMUMH/3/FVp4qaF4CDwCHn7xWFRJpOREIhX/iWfUu # lGkwxnB7Lfyqdg7i4CAfgMf2emWKZchEE2DamfCo5bIX0IgRU3DWcOdR9ePvJ29J # cKwIYpxZcB4RYSoWL5OUakQLCT3JOu4XWaXeVjyHABjQhf3lGpwN4KmIOBGOy/N6 # 0YHOQScW2eW62wIOwhAEuYQceMt6KU32Uw3tLnMbJliiBf3a/hPctVNM9TFY9pcd # UYHGfBx/zD45owf1lTVEQFDg0eqPZKWW29g5haiOd5oAyXHHolzu+bt3bU7lH46b # f7iP12LqDudyrgoF5YWv3NJ4HaGm5V3kPqNqLLF/mjF7alxG+N8= # =hN3h # -----END PGP SIGNATURE----- # gpg: Signature made Fri 03 Mar 2023 00:13:56 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (53 commits) tests/data/acpi/virt: drop (most) duplicate files. hw/cxl/mailbox: Use new UUID network order define for cel_uuid qemu/uuid: Add UUID static initializer qemu/bswap: Add const_le64() tests: acpi: Update q35/DSDT.cxl for removed duplicate UID hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge tests/acpi: Allow update of q35/DSDT.cxl hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL hw/pci-bridge/cxl_downstream: Fix type naming mismatch hw/mem/cxl_type3: Improve error handling in realize() MAINTAINERS: Add Fan Ni as Compute eXpress Link QEMU reviewer intel-iommu: send UNMAP notifications for domain or global inv desc smmu: switch to use memory_region_unmap_iommu_notifier_range() memory: introduce memory_region_unmap_iommu_notifier_range() intel-iommu: fail DEVIOTLB_UNMAP without dt mode intel-iommu: fail MAP notifier without caching mode memory: Optimize replay of guest mapping chardev/char-socket: set s->listener = NULL in char_socket_finalize hw/pci: Trace IRQ routing on PCI topology ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
313 lines
8.9 KiB
C
313 lines
8.9 KiB
C
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu/notify.h"
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#include "qapi/qapi-types-common.h"
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#include "qemu/uuid.h"
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#include "hw/boards.h"
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#include "hw/block/fdc.h"
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#include "hw/block/flash.h"
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#include "hw/i386/x86.h"
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#include "hw/hotplug.h"
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#include "qom/object.h"
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#include "hw/i386/sgx-epc.h"
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#include "hw/firmware/smbios.h"
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#include "hw/cxl/cxl.h"
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#define HPET_INTCAP "hpet-intcap"
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/**
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* PCMachineState:
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* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
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* @boot_cpus: number of present VCPUs
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*/
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typedef struct PCMachineState {
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/*< private >*/
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X86MachineState parent_obj;
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/* <public> */
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/* State for other subsystems/APIs: */
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Notifier machine_done;
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/* Pointers to devices and objects: */
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PCIBus *bus;
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I2CBus *smbus;
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PFlashCFI01 *flash[2];
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ISADevice *pcspk;
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DeviceState *iommu;
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/* Configuration options: */
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uint64_t max_ram_below_4g;
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OnOffAuto vmport;
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SmbiosEntryPointType smbios_entry_point_type;
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bool acpi_build_enabled;
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bool smbus_enabled;
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bool sata_enabled;
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bool hpet_enabled;
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bool i8042_enabled;
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bool default_bus_bypass_iommu;
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uint64_t max_fw_size;
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/* ACPI Memory hotplug IO base address */
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hwaddr memhp_io_base;
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SGXEPCState sgx_epc;
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CXLState cxl_devices_state;
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} PCMachineState;
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#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
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#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
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#define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
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#define PC_MACHINE_VMPORT "vmport"
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#define PC_MACHINE_SMBUS "smbus"
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#define PC_MACHINE_SATA "sata"
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#define PC_MACHINE_I8042 "i8042"
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#define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
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#define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type"
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/**
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* PCMachineClass:
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*
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* Compat fields:
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*
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* @enforce_aligned_dimm: check that DIMM's address/size is aligned by
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* backend's alignment value if provided
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* @acpi_data_size: Size of the chunk of memory at the top of RAM
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* for the BIOS ACPI tables and other BIOS
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* datastructures.
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* @gigabyte_align: Make sure that guest addresses aligned at
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* 1Gbyte boundaries get mapped to host
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* addresses aligned at 1Gbyte boundaries. This
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* way we can use 1GByte pages in the host.
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*
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*/
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struct PCMachineClass {
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/*< private >*/
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X86MachineClass parent_class;
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/*< public >*/
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/* Device configuration: */
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bool pci_enabled;
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bool kvmclock_enabled;
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const char *default_nic_model;
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/* Compat options: */
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/* Default CPU model version. See x86_cpu_set_default_version(). */
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int default_cpu_version;
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/* ACPI compat: */
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bool has_acpi_build;
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bool rsdp_in_ram;
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int legacy_acpi_table_size;
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unsigned acpi_data_size;
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int pci_root_uid;
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/* SMBIOS compat: */
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bool smbios_defaults;
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bool smbios_legacy_mode;
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bool smbios_uuid_encoded;
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/* RAM / address space compat: */
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bool gigabyte_align;
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bool has_reserved_memory;
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bool enforce_aligned_dimm;
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bool broken_reserved_end;
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bool enforce_amd_1tb_hole;
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/* generate legacy CPU hotplug AML */
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bool legacy_cpu_hotplug;
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/* use PVH to load kernels that support this feature */
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bool pvh_enabled;
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/* create kvmclock device even when KVM PV features are not exposed */
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bool kvmclock_create_always;
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};
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#define TYPE_PC_MACHINE "generic-pc-machine"
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OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
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/* ioapic.c */
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GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
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/* pc.c */
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extern int fd_bootchk;
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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void pc_guest_info_init(PCMachineState *pcms);
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#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
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#define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
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#define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
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void pc_pci_as_mapping_init(MemoryRegion *system_memory,
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MemoryRegion *pci_address_space);
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void xen_load_linux(PCMachineState *pcms);
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void pc_memory_init(PCMachineState *pcms,
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MemoryRegion *system_memory,
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MemoryRegion *rom_memory,
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MemoryRegion **ram_memory,
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uint64_t pci_hole64_size);
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uint64_t pc_pci_hole64_start(void);
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DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(struct PCMachineState *pcms,
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ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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bool create_fdctrl,
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uint32_t hpet_irqs);
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void pc_cmos_init(PCMachineState *pcms,
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BusState *ide0, BusState *ide1,
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ISADevice *s);
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void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
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void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
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/* port92.c */
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#define PORT92_A20_LINE "a20"
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#define TYPE_PORT92 "port92"
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/* pc_sysfw.c */
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void pc_system_flash_create(PCMachineState *pcms);
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void pc_system_flash_cleanup_unused(PCMachineState *pcms);
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void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
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bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
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int *data_len);
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void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
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/* hw/i386/acpi-common.c */
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void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
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GArray *entry, bool force_enabled);
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/* sgx.c */
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void pc_machine_init_sgx_epc(PCMachineState *pcms);
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extern GlobalProperty pc_compat_7_2[];
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extern const size_t pc_compat_7_2_len;
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extern GlobalProperty pc_compat_7_1[];
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extern const size_t pc_compat_7_1_len;
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extern GlobalProperty pc_compat_7_0[];
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extern const size_t pc_compat_7_0_len;
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extern GlobalProperty pc_compat_6_2[];
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extern const size_t pc_compat_6_2_len;
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extern GlobalProperty pc_compat_6_1[];
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extern const size_t pc_compat_6_1_len;
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extern GlobalProperty pc_compat_6_0[];
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extern const size_t pc_compat_6_0_len;
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extern GlobalProperty pc_compat_5_2[];
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extern const size_t pc_compat_5_2_len;
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extern GlobalProperty pc_compat_5_1[];
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extern const size_t pc_compat_5_1_len;
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extern GlobalProperty pc_compat_5_0[];
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extern const size_t pc_compat_5_0_len;
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extern GlobalProperty pc_compat_4_2[];
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extern const size_t pc_compat_4_2_len;
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extern GlobalProperty pc_compat_4_1[];
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extern const size_t pc_compat_4_1_len;
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extern GlobalProperty pc_compat_4_0[];
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extern const size_t pc_compat_4_0_len;
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extern GlobalProperty pc_compat_3_1[];
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extern const size_t pc_compat_3_1_len;
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extern GlobalProperty pc_compat_3_0[];
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extern const size_t pc_compat_3_0_len;
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extern GlobalProperty pc_compat_2_12[];
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extern const size_t pc_compat_2_12_len;
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extern GlobalProperty pc_compat_2_11[];
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extern const size_t pc_compat_2_11_len;
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extern GlobalProperty pc_compat_2_10[];
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extern const size_t pc_compat_2_10_len;
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extern GlobalProperty pc_compat_2_9[];
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extern const size_t pc_compat_2_9_len;
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extern GlobalProperty pc_compat_2_8[];
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extern const size_t pc_compat_2_8_len;
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extern GlobalProperty pc_compat_2_7[];
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extern const size_t pc_compat_2_7_len;
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extern GlobalProperty pc_compat_2_6[];
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extern const size_t pc_compat_2_6_len;
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extern GlobalProperty pc_compat_2_5[];
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extern const size_t pc_compat_2_5_len;
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extern GlobalProperty pc_compat_2_4[];
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extern const size_t pc_compat_2_4_len;
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extern GlobalProperty pc_compat_2_3[];
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extern const size_t pc_compat_2_3_len;
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extern GlobalProperty pc_compat_2_2[];
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extern const size_t pc_compat_2_2_len;
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extern GlobalProperty pc_compat_2_1[];
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extern const size_t pc_compat_2_1_len;
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extern GlobalProperty pc_compat_2_0[];
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extern const size_t pc_compat_2_0_len;
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extern GlobalProperty pc_compat_1_7[];
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extern const size_t pc_compat_1_7_len;
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extern GlobalProperty pc_compat_1_6[];
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extern const size_t pc_compat_1_6_len;
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extern GlobalProperty pc_compat_1_5[];
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extern const size_t pc_compat_1_5_len;
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extern GlobalProperty pc_compat_1_4[];
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extern const size_t pc_compat_1_4_len;
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int pc_machine_kvm_type(MachineState *machine, const char *vm_type);
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#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
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static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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optsfn(mc); \
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mc->init = initfn; \
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mc->kvm_type = pc_machine_kvm_type; \
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} \
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static const TypeInfo pc_machine_type_##suffix = { \
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.name = namestr TYPE_MACHINE_SUFFIX, \
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.parent = TYPE_PC_MACHINE, \
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.class_init = pc_machine_##suffix##_class_init, \
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}; \
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static void pc_machine_init_##suffix(void) \
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{ \
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type_register(&pc_machine_type_##suffix); \
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} \
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type_init(pc_machine_init_##suffix)
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#endif
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