9049383002
Convert the sh4 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-id: 20221124115023.2437291-17-peter.maydell@linaro.org
59 lines
1.6 KiB
C
59 lines
1.6 KiB
C
/*
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* QEMU SuperH CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_SUPERH_CPU_QOM_H
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#define QEMU_SUPERH_CPU_QOM_H
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#include "hw/core/cpu.h"
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#include "qom/object.h"
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#define TYPE_SUPERH_CPU "superh-cpu"
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#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r")
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#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r")
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#define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785")
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OBJECT_DECLARE_CPU_TYPE(SuperHCPU, SuperHCPUClass, SUPERH_CPU)
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/**
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* SuperHCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_phases: The parent class' reset phase handlers.
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* @pvr: Processor Version Register
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* @prr: Processor Revision Register
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* @cvr: Cache Version Register
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*
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* A SuperH CPU model.
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*/
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struct SuperHCPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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ResettablePhases parent_phases;
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uint32_t pvr;
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uint32_t prr;
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uint32_t cvr;
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};
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#endif
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