qemu-e2k/target/i386
Liu Jingqi 24261de491 x86/cpu: Enable MOVDIRI cpu feature
MOVDIRI moves doubleword or quadword from register to memory through
direct store which is implemented by using write combining (WC) for
writing data directly into memory without caching the data.

The bit definition:
CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI

The release document ref below link:
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set-extensions-programming-reference.pdf

Cc: Xu Tao <tao3.xu@intel.com>
Signed-off-by: Liu Jingqi <jingqi.liu@intel.com>
Message-Id: <1541488407-17045-2-git-send-email-jingqi.liu@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-12-11 18:50:48 -02:00
..
hvf i386: hvf: Fix overrun of _decode_tbl1 2018-12-03 15:09:55 +00:00
arch_dump.c dump: add kernel_gs_base to QEMU CPU state 2018-07-16 16:13:34 +02:00
arch_memory_mapping.c
bpt_helper.c
cc_helper_template.h
cc_helper.c
cpu-qom.h
cpu.c x86/cpu: Enable MOVDIRI cpu feature 2018-12-11 18:50:48 -02:00
cpu.h x86/cpu: Enable MOVDIRI cpu feature 2018-12-11 18:50:48 -02:00
excp_helper.c target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK 2018-10-02 19:09:12 +02:00
fpu_helper.c
gdbstub.c
hax-all.c
hax-darwin.c
hax-darwin.h
hax-i386.h
hax-interface.h
hax-mem.c
hax-windows.c
hax-windows.h
helper.c
helper.h
hyperv-proto.h x86: hv_evmcs CPU flag support 2018-11-06 21:35:04 +01:00
hyperv-stub.c hyperv: qom-ify SynIC 2018-10-19 13:44:14 +02:00
hyperv.c hyperv: process POST_MESSAGE hypercall 2018-10-19 13:44:14 +02:00
hyperv.h hyperv: qom-ify SynIC 2018-10-19 13:44:14 +02:00
int_helper.c
kvm_i386.h hyperv: ensure VP index equal to QEMU cpu_index 2018-07-16 16:58:16 +02:00
kvm-stub.c hyperv: ensure VP index equal to QEMU cpu_index 2018-07-16 16:58:16 +02:00
kvm.c migration: savevm: consult migration blockers 2018-11-27 15:06:14 +01:00
machine.c hyperv: qom-ify SynIC 2018-10-19 13:44:14 +02:00
Makefile.objs i386: add hyperv-stub for CONFIG_HYPERV=n 2018-10-19 13:44:14 +02:00
mem_helper.c target/i386: Convert to HAVE_CMPXCHG128 2018-10-18 19:46:53 -07:00
misc_helper.c i386: implement MSR_SMI_COUNT for TCG 2018-07-30 14:00:11 +02:00
monitor.c i386/monitor.c: make addresses canonical for "info mem" and "info tlb" 2018-07-02 15:41:18 +02:00
mpx_helper.c
ops_sse_header.h
ops_sse.h
seg_helper.c target/i386: Clear RF on SYSCALL instruction 2018-11-06 21:35:05 +01:00
sev_i386.h
sev-stub.c
sev.c
shift_helper_template.h
smm_helper.c i386: implement MSR_SMI_COUNT for TCG 2018-07-30 14:00:11 +02:00
svm_helper.c target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK 2018-10-02 19:09:12 +02:00
svm.h target-i386: Add NPT support 2018-07-02 15:41:18 +02:00
TODO
trace-events
translate.c target/i386: Generate #UD when applying LOCK to a register destination 2018-11-27 15:35:19 +01:00
whp-dispatch.h whpx: commit missing file 2018-06-28 19:05:31 +02:00
whpx-all.c WHPX: register for unrecognized MSR exits 2018-06-28 19:05:36 +02:00
xsave_helper.c