qemu-e2k/include/hw/ppc
Cédric Le Goater 24ece07250 ppc/pnv: add XSCOM handlers to PnvCore
Now that we are using real HW ids for the cores in PowerNV chips, we
can route the XSCOM accesses to them. We just need to attach a
specific XSCOM memory region to each core in the appropriate window
for the core number.

To start with, let's install the DTS (Digital Thermal Sensor) handlers
which should return 38°C for each core.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-28 09:38:25 +11:00
..
fdt.h ppc: do not redefine CPUPPCState 2016-09-13 19:09:44 +02:00
mac_dbdma.h Clean up decorations and whitespace around header guards 2016-07-12 16:20:46 +02:00
openpic.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
pnv_core.h ppc/pnv: add XSCOM handlers to PnvCore 2016-10-28 09:38:25 +11:00
pnv_xscom.h ppc/pnv: add XSCOM handlers to PnvCore 2016-10-28 09:38:25 +11:00
pnv.h ppc/pnv: add XSCOM infrastructure 2016-10-28 09:38:25 +11:00
ppc4xx.h Remove unused function declarations 2016-09-15 15:32:22 +03:00
ppc_e500.h
ppc.h ppc: parse cpu features once 2016-08-13 17:32:58 +10:00
spapr_cpu_core.h spapr: Introduce sPAPRCPUCoreClass 2016-09-23 12:39:06 +10:00
spapr_drc.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
spapr_rtas.h tests: add RTAS command in the protocol 2016-09-23 10:29:40 +10:00
spapr_vio.h pseries: Remove unused callbacks from sPAPR VIO bus state 2016-10-28 09:36:58 +11:00
spapr.h spapr_pci: Add a 64-bit MMIO window 2016-10-16 12:03:09 +11:00
xics.h ppc/xics: change the icp_ routines API to use an 'ICPState *' argument 2016-10-28 09:36:58 +11:00