Max Filippov 251634f4ce target/xtensa: add sample_controller core ... The sample_controller core is a simple noMMU general purpose core, modern analog of de212. It is used as a default core in the xtensa port of Zephyr. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2018-01-22 11:54:58 -08:00
..
core-dc232b	target/xtensa: switch dc232b to libisa	2017-12-18 21:26:19 -08:00
core-dc233c	target/xtensa: switch dc233c to libisa	2017-12-18 21:26:19 -08:00
core-de212	target/xtensa: add de212 core	2018-01-11 12:45:27 -08:00
core-fsf	target/xtensa: switch fsf to libisa	2017-12-18 21:26:19 -08:00
core-sample_controller	target/xtensa: add sample_controller core	2018-01-22 11:54:58 -08:00
core-dc232b.c	target/xtensa: switch dc232b to libisa	2017-12-18 21:26:19 -08:00
core-dc233c.c	target/xtensa: switch dc233c to libisa	2017-12-18 21:26:19 -08:00
core-de212.c	target/xtensa: add de212 core	2018-01-11 12:45:27 -08:00
core-fsf.c	target/xtensa: switch fsf to libisa	2017-12-18 21:26:19 -08:00
core-sample_controller.c	target/xtensa: add sample_controller core	2018-01-22 11:54:58 -08:00
cpu-qom.h
cpu.c	target/xtensa: implement disassembler	2018-01-09 09:55:39 -08:00
cpu.h	target/xtensa: allow different default CPU for MMU/noMMU	2018-01-22 11:54:23 -08:00
gdbstub.c
helper.c	target/xtensa: use libisa for instruction decoding	2018-01-09 09:55:38 -08:00
helper.h
import_core.sh
Makefile.objs	target/xtensa: add sample_controller core	2018-01-22 11:54:58 -08:00
monitor.c
op_helper.c
overlay_tool.h	target/xtensa: fix default sysrom/sysram addresses	2018-01-11 09:31:26 -08:00
translate.c	target/xtensa: implement const16	2018-01-09 09:55:39 -08:00
xtensa-isa-internal.h
xtensa-isa.c
xtensa-isa.h
xtensa-semi.c