qemu-e2k/target/i386
Eduardo Habkost 258fe08bd3 x86: host-phys-bits-limit option
Some downstream distributions of QEMU set host-phys-bits=on by
default.  This worked very well for most use cases, because
phys-bits really didn't have huge consequences. The only
difference was on the CPUID data seen by guests, and on the
handling of reserved bits.

This changed in KVM commit 855feb673640 ("KVM: MMU: Add 5 level
EPT & Shadow page table support").  Now choosing a large
phys-bits value for a VM has bigger impact: it will make KVM use
5-level EPT even when it's not really necessary.  This means
using the host phys-bits value may not be the best choice.

Management software could address this problem by manually
configuring phys-bits depending on the size of the VM and the
amount of MMIO address space required for hotplug.  But this is
not trivial to implement.

However, there's another workaround that would work for most
cases: keep using the host phys-bits value, but only if it's
smaller than 48.  This patch makes this possible by introducing a
new "-cpu" option: "host-phys-bits-limit".  Management software
or users can make sure they will always use 4-level EPT using:
"host-phys-bits=on,host-phys-bits-limit=48".

This behavior is still not enabled by default because QEMU
doesn't enable host-phys-bits=on by default.  But users,
management software, or downstream distributions may choose to
change their defaults using the new option.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20181211192527.13254-1-ehabkost@redhat.com>
[ehabkost: removed test code while some issues are addressed]
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-01-14 12:23:36 -02:00
..
hvf i386: hvf: drop debug printf in decode_sldtgroup 2018-12-18 14:57:48 +01:00
arch_dump.c
arch_memory_mapping.c
bpt_helper.c
cc_helper_template.h
cc_helper.c
cpu-qom.h
cpu.c x86: host-phys-bits-limit option 2019-01-14 12:23:36 -02:00
cpu.h x86: host-phys-bits-limit option 2019-01-14 12:23:36 -02:00
excp_helper.c target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK 2018-10-02 19:09:12 +02:00
fpu_helper.c
gdbstub.c
hax-all.c target: hax: fix errors in comment 2018-12-11 18:28:47 +01:00
hax-i386.h hax: Support for Linux hosts 2019-01-11 13:57:24 +01:00
hax-interface.h
hax-mem.c qemu/queue.h: leave head structs anonymous unless necessary 2019-01-11 15:46:55 +01:00
hax-posix.c hax: Support for Linux hosts 2019-01-11 13:57:24 +01:00
hax-posix.h hax: Support for Linux hosts 2019-01-11 13:57:24 +01:00
hax-windows.c
hax-windows.h
helper.c
helper.h
hyperv-proto.h x86: hv_evmcs CPU flag support 2018-11-06 21:35:04 +01:00
hyperv-stub.c hyperv: qom-ify SynIC 2018-10-19 13:44:14 +02:00
hyperv.c hyperv: process POST_MESSAGE hypercall 2018-10-19 13:44:14 +02:00
hyperv.h hyperv: qom-ify SynIC 2018-10-19 13:44:14 +02:00
int_helper.c
kvm_i386.h hyperv: ensure VP index equal to QEMU cpu_index 2018-07-16 16:58:16 +02:00
kvm-stub.c hyperv: ensure VP index equal to QEMU cpu_index 2018-07-16 16:58:16 +02:00
kvm.c i386/kvm: expose HV_CPUID_ENLIGHTMENT_INFO.EAX and HV_CPUID_NESTED_FEATURES.EAX as feature words 2019-01-14 12:23:36 -02:00
machine.c hyperv: qom-ify SynIC 2018-10-19 13:44:14 +02:00
Makefile.objs hax: Support for Linux hosts 2019-01-11 13:57:24 +01:00
mem_helper.c target/i386: Convert to HAVE_CMPXCHG128 2018-10-18 19:46:53 -07:00
misc_helper.c i386: implement MSR_SMI_COUNT for TCG 2018-07-30 14:00:11 +02:00
monitor.c
mpx_helper.c
ops_sse_header.h
ops_sse.h
seg_helper.c target/i386: Clear RF on SYSCALL instruction 2018-11-06 21:35:05 +01:00
sev_i386.h
sev-stub.c
sev.c Clean up includes 2018-12-20 10:29:08 +01:00
shift_helper_template.h
smm_helper.c i386: implement MSR_SMI_COUNT for TCG 2018-07-30 14:00:11 +02:00
svm_helper.c target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK 2018-10-02 19:09:12 +02:00
svm.h
TODO
trace-events
translate.c avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
whp-dispatch.h Clean up includes 2018-12-20 10:29:08 +01:00
whpx-all.c
xsave_helper.c