ee86213aa3
Stop including exec/address-spaces.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-5-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
217 lines
7.0 KiB
C
217 lines
7.0 KiB
C
/*
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/main-loop.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "qemu/host-utils.h"
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#include "qemu/timer.h"
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#ifndef CONFIG_USER_ONLY
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void HELPER(update_ccount)(CPUXtensaState *env)
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{
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uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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env->ccount_time = now;
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env->sregs[CCOUNT] = env->ccount_base +
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(uint32_t)((now - env->time_base) *
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env->config->clock_freq_khz / 1000000);
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}
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void HELPER(wsr_ccount)(CPUXtensaState *env, uint32_t v)
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{
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int i;
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HELPER(update_ccount)(env);
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env->ccount_base += v - env->sregs[CCOUNT];
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for (i = 0; i < env->config->nccompare; ++i) {
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HELPER(update_ccompare)(env, i);
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}
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}
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void HELPER(update_ccompare)(CPUXtensaState *env, uint32_t i)
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{
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uint64_t dcc;
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qatomic_and(&env->sregs[INTSET],
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~(1u << env->config->timerint[i]));
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HELPER(update_ccount)(env);
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dcc = (uint64_t)(env->sregs[CCOMPARE + i] - env->sregs[CCOUNT] - 1) + 1;
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timer_mod(env->ccompare[i].timer,
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env->ccount_time + (dcc * 1000000) / env->config->clock_freq_khz);
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env->yield_needed = 1;
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}
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/*!
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* Check vaddr accessibility/cache attributes and raise an exception if
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* specified by the ATOMCTL SR.
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*
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* Note: local memory exclusion is not implemented
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*/
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void HELPER(check_atomctl)(CPUXtensaState *env, uint32_t pc, uint32_t vaddr)
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{
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uint32_t paddr, page_size, access;
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uint32_t atomctl = env->sregs[ATOMCTL];
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int rc = xtensa_get_physical_addr(env, true, vaddr, 1,
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xtensa_get_cring(env), &paddr, &page_size, &access);
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/*
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* s32c1i never causes LOAD_PROHIBITED_CAUSE exceptions,
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* see opcode description in the ISA
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*/
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if (rc == 0 &&
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(access & (PAGE_READ | PAGE_WRITE)) != (PAGE_READ | PAGE_WRITE)) {
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rc = STORE_PROHIBITED_CAUSE;
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}
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if (rc) {
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HELPER(exception_cause_vaddr)(env, pc, rc, vaddr);
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}
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/*
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* When data cache is not configured use ATOMCTL bypass field.
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* See ISA, 4.3.12.4 The Atomic Operation Control Register (ATOMCTL)
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* under the Conditional Store Option.
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*/
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if (!xtensa_option_enabled(env->config, XTENSA_OPTION_DCACHE)) {
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access = PAGE_CACHE_BYPASS;
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}
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switch (access & PAGE_CACHE_MASK) {
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case PAGE_CACHE_WB:
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atomctl >>= 2;
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/* fall through */
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case PAGE_CACHE_WT:
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atomctl >>= 2;
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/* fall through */
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case PAGE_CACHE_BYPASS:
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if ((atomctl & 0x3) == 0) {
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HELPER(exception_cause_vaddr)(env, pc,
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LOAD_STORE_ERROR_CAUSE, vaddr);
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}
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break;
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case PAGE_CACHE_ISOLATE:
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HELPER(exception_cause_vaddr)(env, pc,
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LOAD_STORE_ERROR_CAUSE, vaddr);
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break;
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default:
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break;
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}
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}
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void HELPER(check_exclusive)(CPUXtensaState *env, uint32_t pc, uint32_t vaddr,
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uint32_t is_write)
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{
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uint32_t paddr, page_size, access;
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uint32_t atomctl = env->sregs[ATOMCTL];
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int rc = xtensa_get_physical_addr(env, true, vaddr, is_write,
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xtensa_get_cring(env), &paddr,
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&page_size, &access);
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if (rc) {
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HELPER(exception_cause_vaddr)(env, pc, rc, vaddr);
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}
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/* When data cache is not configured use ATOMCTL bypass field. */
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if (!xtensa_option_enabled(env->config, XTENSA_OPTION_DCACHE)) {
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access = PAGE_CACHE_BYPASS;
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}
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switch (access & PAGE_CACHE_MASK) {
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case PAGE_CACHE_WB:
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atomctl >>= 2;
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/* fall through */
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case PAGE_CACHE_WT:
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atomctl >>= 2;
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/* fall through */
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case PAGE_CACHE_BYPASS:
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if ((atomctl & 0x3) == 0) {
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HELPER(exception_cause_vaddr)(env, pc,
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EXCLUSIVE_ERROR_CAUSE, vaddr);
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}
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break;
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case PAGE_CACHE_ISOLATE:
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HELPER(exception_cause_vaddr)(env, pc,
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LOAD_STORE_ERROR_CAUSE, vaddr);
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break;
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default:
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break;
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}
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}
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void HELPER(wsr_memctl)(CPUXtensaState *env, uint32_t v)
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{
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_ICACHE)) {
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if (extract32(v, MEMCTL_IUSEWAYS_SHIFT, MEMCTL_IUSEWAYS_LEN) >
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env->config->icache_ways) {
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deposit32(v, MEMCTL_IUSEWAYS_SHIFT, MEMCTL_IUSEWAYS_LEN,
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env->config->icache_ways);
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}
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}
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_DCACHE)) {
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if (extract32(v, MEMCTL_DUSEWAYS_SHIFT, MEMCTL_DUSEWAYS_LEN) >
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env->config->dcache_ways) {
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deposit32(v, MEMCTL_DUSEWAYS_SHIFT, MEMCTL_DUSEWAYS_LEN,
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env->config->dcache_ways);
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}
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if (extract32(v, MEMCTL_DALLOCWAYS_SHIFT, MEMCTL_DALLOCWAYS_LEN) >
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env->config->dcache_ways) {
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deposit32(v, MEMCTL_DALLOCWAYS_SHIFT, MEMCTL_DALLOCWAYS_LEN,
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env->config->dcache_ways);
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}
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}
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env->sregs[MEMCTL] = v & env->config->memctl_mask;
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}
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#endif
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uint32_t HELPER(rer)(CPUXtensaState *env, uint32_t addr)
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{
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#ifndef CONFIG_USER_ONLY
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return address_space_ldl(env->address_space_er, addr,
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MEMTXATTRS_UNSPECIFIED, NULL);
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#else
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return 0;
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#endif
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}
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void HELPER(wer)(CPUXtensaState *env, uint32_t data, uint32_t addr)
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{
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#ifndef CONFIG_USER_ONLY
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address_space_stl(env->address_space_er, addr, data,
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MEMTXATTRS_UNSPECIFIED, NULL);
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#endif
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}
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