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/* SPDX-License-Identifier: MIT */
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/*
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* Define target-specific register size
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* Copyright (c) 2008 Fabrice Bellard
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*/
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#ifndef TCG_TARGET_REG_BITS_H
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#define TCG_TARGET_REG_BITS_H
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#ifdef _ARCH_PPC64
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# define TCG_TARGET_REG_BITS 64
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#else
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# define TCG_TARGET_REG_BITS 32
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#endif
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#endif
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