Richard Henderson 62f2b0389f target/openrisc: Add support for ORFPX64A32 ... This is hardware support for double-precision floating-point using pairs of 32-bit registers. Fix latent bugs in the heretofore unused helper_itofd and helper_ftoid. Include the bit for cpu "any". Change the default cpu for linux-user to "any". Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2019-09-04 12:53:33 -07:00
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cpu_loop.c	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
signal.c
sockbits.h
syscall_nr.h	Supply missing header guards	2019-06-12 13:20:21 +02:00
target_cpu.h	target/openrisc: Fix LGPL information in the file headers	2019-05-08 17:45:54 +02:00
target_elf.h	target/openrisc: Add support for ORFPX64A32	2019-09-04 12:53:33 -07:00
target_fcntl.h
target_signal.h
target_structs.h	target/openrisc: Fix LGPL information in the file headers	2019-05-08 17:45:54 +02:00
target_syscall.h
termbits.h	Supply missing header guards	2019-06-12 13:20:21 +02:00