936fda4d77
The commitd03b174a83(target/ppc: simplify bcdadd/sub functions) meant to simplify some of the code but it inadvertently altered the way the CR6 field is set after the operation has overflowed. The CR6 bits are set based on the *unbounded* result of the operation, so we need to look at the result before returning from bcd_add_mag, otherwise we will look at 0 when it overflows. Consider the following subtraction: v0 = 0x9999999999999999999999999999999c (maximum positive BCD value) v1 = 0x0000000000000000000000000000001d (negative one BCD value) bcdsub. v0,v0,v1,0 The Power ISA 2.07B says: If the unbounded result is greater than zero, do the following. If PS=0, the sign code of the result is set to 0b1100. If PS=1, the sign code of the result is set to 0b1111. If the operation overflows, CR field 6 is set to 0b0101. Otherwise, CR field 6 is set to 0b0100. POWER9 hardware: vr0 = 0x0000000000000000000000000000000c (positive zero BCD value) cr6 = 0b0101 (0x5) (positive, overflow) QEMU: vr0 = 0x0000000000000000000000000000000c (positive zero BCD value) cr6 = 0b0011 (0x3) (zero, overflow) <--- wrong This patch reverts the part ofd03b174a83that introduced the problem and adds a test-case to avoid further regressions: before: $ make run-tcg-tests-ppc64le-linux-user (...) TEST bcdsub on ppc64le bcdsub: qemu/tests/tcg/ppc64le/bcdsub.c:58: test_bcdsub_gt: Assertion `(cr >> 4) == ((1 << 2) | (1 << 0))' failed. Fixes:d03b174a83(target/ppc: simplify bcdadd/sub functions) Reported-by: Paul Clarke <pc@us.ibm.com> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20210222194035.2723056-1-farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
131 lines
2.9 KiB
C
131 lines
2.9 KiB
C
#include <assert.h>
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#include <unistd.h>
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#include <signal.h>
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#define CRF_LT (1 << 3)
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#define CRF_GT (1 << 2)
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#define CRF_EQ (1 << 1)
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#define CRF_SO (1 << 0)
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#define UNDEF 0
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#define BCDSUB(vra, vrb, ps) \
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asm ("bcdsub. %1,%2,%3,%4;" \
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"mfocrf %0,0b10;" \
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: "=r" (cr), "=v" (vrt) \
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: "v" (vra), "v" (vrb), "i" (ps) \
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: );
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#define TEST(vra, vrb, ps, exp_res, exp_cr6) \
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do { \
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__int128 vrt = 0; \
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int cr = 0; \
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BCDSUB(vra, vrb, ps); \
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if (exp_res) \
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assert(vrt == exp_res); \
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assert((cr >> 4) == exp_cr6); \
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} while (0)
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/*
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* Unbounded result is equal to zero:
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* sign = (PS) ? 0b1111 : 0b1100
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* CR6 = 0b0010
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*/
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void test_bcdsub_eq(void)
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{
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__int128 a, b;
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/* maximum positive BCD value */
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a = b = (((__int128) 0x9999999999999999) << 64 | 0x999999999999999c);
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TEST(a, b, 0, 0xc, CRF_EQ);
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TEST(a, b, 1, 0xf, CRF_EQ);
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}
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/*
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* Unbounded result is greater than zero:
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* sign = (PS) ? 0b1111 : 0b1100
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* CR6 = (overflow) ? 0b0101 : 0b0100
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*/
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void test_bcdsub_gt(void)
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{
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__int128 a, b, c;
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/* maximum positive BCD value */
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a = (((__int128) 0x9999999999999999) << 64 | 0x999999999999999c);
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/* negative one BCD value */
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b = (__int128) 0x1d;
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TEST(a, b, 0, 0xc, (CRF_GT | CRF_SO));
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TEST(a, b, 1, 0xf, (CRF_GT | CRF_SO));
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c = (((__int128) 0x9999999999999999) << 64 | 0x999999999999998c);
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TEST(c, b, 0, a, CRF_GT);
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TEST(c, b, 1, (a | 0x3), CRF_GT);
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}
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/*
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* Unbounded result is less than zero:
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* sign = 0b1101
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* CR6 = (overflow) ? 0b1001 : 0b1000
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*/
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void test_bcdsub_lt(void)
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{
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__int128 a, b;
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/* positive zero BCD value */
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a = (__int128) 0xc;
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/* positive one BCD value */
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b = (__int128) 0x1c;
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TEST(a, b, 0, 0x1d, CRF_LT);
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TEST(a, b, 1, 0x1d, CRF_LT);
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/* maximum negative BCD value */
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a = (((__int128) 0x9999999999999999) << 64 | 0x999999999999999d);
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/* positive one BCD value */
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b = (__int128) 0x1c;
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TEST(a, b, 0, 0xd, (CRF_LT | CRF_SO));
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TEST(a, b, 1, 0xd, (CRF_LT | CRF_SO));
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}
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void test_bcdsub_invalid(void)
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{
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__int128 a, b;
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/* positive one BCD value */
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a = (__int128) 0x1c;
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b = 0xf00;
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TEST(a, b, 0, UNDEF, CRF_SO);
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TEST(a, b, 1, UNDEF, CRF_SO);
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TEST(b, a, 0, UNDEF, CRF_SO);
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TEST(b, a, 1, UNDEF, CRF_SO);
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a = 0xbad;
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TEST(a, b, 0, UNDEF, CRF_SO);
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TEST(a, b, 1, UNDEF, CRF_SO);
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}
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int main(void)
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{
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struct sigaction action;
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action.sa_handler = _exit;
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sigaction(SIGABRT, &action, NULL);
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test_bcdsub_eq();
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test_bcdsub_gt();
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test_bcdsub_lt();
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test_bcdsub_invalid();
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return 0;
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}
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