a8d2532645
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
310 lines
8.5 KiB
C
310 lines
8.5 KiB
C
/*
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* Simple C functions to supplement the C library
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/cutils.h"
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#include "qemu/bswap.h"
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static bool
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buffer_zero_int(const void *buf, size_t len)
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{
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if (unlikely(len < 8)) {
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/* For a very small buffer, simply accumulate all the bytes. */
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const unsigned char *p = buf;
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const unsigned char *e = buf + len;
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unsigned char t = 0;
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do {
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t |= *p++;
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} while (p < e);
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return t == 0;
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} else {
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/* Otherwise, use the unaligned memory access functions to
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handle the beginning and end of the buffer, with a couple
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of loops handling the middle aligned section. */
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uint64_t t = ldq_he_p(buf);
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const uint64_t *p = (uint64_t *)(((uintptr_t)buf + 8) & -8);
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const uint64_t *e = (uint64_t *)(((uintptr_t)buf + len) & -8);
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for (; p + 8 <= e; p += 8) {
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__builtin_prefetch(p + 8);
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if (t) {
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return false;
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}
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t = p[0] | p[1] | p[2] | p[3] | p[4] | p[5] | p[6] | p[7];
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}
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while (p < e) {
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t |= *p++;
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}
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t |= ldq_he_p(buf + len - 8);
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return t == 0;
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}
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}
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#if defined(CONFIG_AVX2_OPT) || defined(__SSE2__)
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/* Do not use push_options pragmas unnecessarily, because clang
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* does not support them.
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*/
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#ifdef CONFIG_AVX2_OPT
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#pragma GCC push_options
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#pragma GCC target("sse2")
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#endif
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#include <emmintrin.h>
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/* Note that each of these vectorized functions require len >= 64. */
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static bool
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buffer_zero_sse2(const void *buf, size_t len)
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{
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__m128i t = _mm_loadu_si128(buf);
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__m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16);
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__m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16);
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__m128i zero = _mm_setzero_si128();
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/* Loop over 16-byte aligned blocks of 64. */
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while (likely(p <= e)) {
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__builtin_prefetch(p);
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t = _mm_cmpeq_epi8(t, zero);
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if (unlikely(_mm_movemask_epi8(t) != 0xFFFF)) {
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return false;
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}
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t = p[-4] | p[-3] | p[-2] | p[-1];
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p += 4;
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}
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/* Finish the aligned tail. */
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t |= e[-3];
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t |= e[-2];
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t |= e[-1];
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/* Finish the unaligned tail. */
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t |= _mm_loadu_si128(buf + len - 16);
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return _mm_movemask_epi8(_mm_cmpeq_epi8(t, zero)) == 0xFFFF;
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}
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#ifdef CONFIG_AVX2_OPT
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#pragma GCC pop_options
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#endif
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#ifdef CONFIG_AVX2_OPT
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/* Note that due to restrictions/bugs wrt __builtin functions in gcc <= 4.8,
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* the includes have to be within the corresponding push_options region, and
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* therefore the regions themselves have to be ordered with increasing ISA.
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*/
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#pragma GCC push_options
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#pragma GCC target("sse4")
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#include <smmintrin.h>
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static bool
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buffer_zero_sse4(const void *buf, size_t len)
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{
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__m128i t = _mm_loadu_si128(buf);
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__m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16);
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__m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16);
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/* Loop over 16-byte aligned blocks of 64. */
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while (likely(p <= e)) {
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__builtin_prefetch(p);
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if (unlikely(!_mm_testz_si128(t, t))) {
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return false;
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}
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t = p[-4] | p[-3] | p[-2] | p[-1];
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p += 4;
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}
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/* Finish the aligned tail. */
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t |= e[-3];
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t |= e[-2];
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t |= e[-1];
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/* Finish the unaligned tail. */
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t |= _mm_loadu_si128(buf + len - 16);
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return _mm_testz_si128(t, t);
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}
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#pragma GCC pop_options
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#pragma GCC push_options
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#pragma GCC target("avx2")
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#include <immintrin.h>
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static bool
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buffer_zero_avx2(const void *buf, size_t len)
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{
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/* Begin with an unaligned head of 32 bytes. */
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__m256i t = _mm256_loadu_si256(buf);
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__m256i *p = (__m256i *)(((uintptr_t)buf + 5 * 32) & -32);
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__m256i *e = (__m256i *)(((uintptr_t)buf + len) & -32);
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if (likely(p <= e)) {
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/* Loop over 32-byte aligned blocks of 128. */
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do {
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__builtin_prefetch(p);
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if (unlikely(!_mm256_testz_si256(t, t))) {
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return false;
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}
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t = p[-4] | p[-3] | p[-2] | p[-1];
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p += 4;
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} while (p <= e);
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} else {
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t |= _mm256_loadu_si256(buf + 32);
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if (len <= 128) {
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goto last2;
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}
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}
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/* Finish the last block of 128 unaligned. */
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t |= _mm256_loadu_si256(buf + len - 4 * 32);
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t |= _mm256_loadu_si256(buf + len - 3 * 32);
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last2:
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t |= _mm256_loadu_si256(buf + len - 2 * 32);
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t |= _mm256_loadu_si256(buf + len - 1 * 32);
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return _mm256_testz_si256(t, t);
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}
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#pragma GCC pop_options
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#endif /* CONFIG_AVX2_OPT */
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/* Note that for test_buffer_is_zero_next_accel, the most preferred
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* ISA must have the least significant bit.
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*/
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#define CACHE_AVX2 1
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#define CACHE_SSE4 2
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#define CACHE_SSE2 4
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/* Make sure that these variables are appropriately initialized when
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* SSE2 is enabled on the compiler command-line, but the compiler is
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* too old to support CONFIG_AVX2_OPT.
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*/
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#ifdef CONFIG_AVX2_OPT
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# define INIT_CACHE 0
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# define INIT_ACCEL buffer_zero_int
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#else
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# ifndef __SSE2__
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# error "ISA selection confusion"
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# endif
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# define INIT_CACHE CACHE_SSE2
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# define INIT_ACCEL buffer_zero_sse2
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#endif
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static unsigned cpuid_cache = INIT_CACHE;
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static bool (*buffer_accel)(const void *, size_t) = INIT_ACCEL;
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static void init_accel(unsigned cache)
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{
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bool (*fn)(const void *, size_t) = buffer_zero_int;
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if (cache & CACHE_SSE2) {
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fn = buffer_zero_sse2;
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}
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#ifdef CONFIG_AVX2_OPT
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if (cache & CACHE_SSE4) {
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fn = buffer_zero_sse4;
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}
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if (cache & CACHE_AVX2) {
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fn = buffer_zero_avx2;
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}
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#endif
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buffer_accel = fn;
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}
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#ifdef CONFIG_AVX2_OPT
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#include "qemu/cpuid.h"
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static void __attribute__((constructor)) init_cpuid_cache(void)
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{
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int max = __get_cpuid_max(0, NULL);
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int a, b, c, d;
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unsigned cache = 0;
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if (max >= 1) {
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__cpuid(1, a, b, c, d);
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if (d & bit_SSE2) {
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cache |= CACHE_SSE2;
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}
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if (c & bit_SSE4_1) {
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cache |= CACHE_SSE4;
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}
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/* We must check that AVX is not just available, but usable. */
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if ((c & bit_OSXSAVE) && (c & bit_AVX) && max >= 7) {
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int bv;
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__asm("xgetbv" : "=a"(bv), "=d"(d) : "c"(0));
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__cpuid_count(7, 0, a, b, c, d);
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if ((bv & 6) == 6 && (b & bit_AVX2)) {
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cache |= CACHE_AVX2;
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}
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}
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}
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cpuid_cache = cache;
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init_accel(cache);
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}
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#endif /* CONFIG_AVX2_OPT */
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bool test_buffer_is_zero_next_accel(void)
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{
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/* If no bits set, we just tested buffer_zero_int, and there
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are no more acceleration options to test. */
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if (cpuid_cache == 0) {
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return false;
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}
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/* Disable the accelerator we used before and select a new one. */
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cpuid_cache &= cpuid_cache - 1;
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init_accel(cpuid_cache);
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return true;
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}
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static bool select_accel_fn(const void *buf, size_t len)
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{
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if (likely(len >= 64)) {
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return buffer_accel(buf, len);
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}
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return buffer_zero_int(buf, len);
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}
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#else
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#define select_accel_fn buffer_zero_int
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bool test_buffer_is_zero_next_accel(void)
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{
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return false;
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}
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#endif
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/*
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* Checks if a buffer is all zeroes
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*/
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bool buffer_is_zero(const void *buf, size_t len)
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{
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if (unlikely(len == 0)) {
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return true;
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}
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/* Fetch the beginning of the buffer while we select the accelerator. */
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__builtin_prefetch(buf);
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/* Use an optimized zero check if possible. Note that this also
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includes a check for an unrolled loop over 64-bit integers. */
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return select_accel_fn(buf, len);
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}
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