qemu-e2k/target-sparc
Igor V. Kovalenko 2aae2b8e0a sparc64: fix pstate privilege bits
- refactor code to handle hpstate only if available for current cpu
- conditionally set hypervisor bit in hpstate register
- reorder softmmu indices so user accessable ones go first, translation context
  macros supervisor() and hypervisor() adjusted as well
- disable sparcv8 registers for TARGET_SPARC64
- fix cpu_mmu_index to use sparcv9 bits only

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22 12:48:52 +00:00
..
cpu.h sparc64: fix pstate privilege bits 2010-05-22 12:48:52 +00:00
exec.h sparc: move DT and QT defines to op_helper.c 2010-05-16 08:33:02 +00:00
helper.c sparc64: fix pstate privilege bits 2010-05-22 12:48:52 +00:00
helper.h target-sparc: Inline some generation of carry for ADDX/SUBX. 2010-05-20 19:58:28 +00:00
machine.c sparc: Fix lazy flag calculation on interrupts, refactor 2010-05-09 20:19:04 +00:00
op_helper.c sparc64: fix pstate privilege bits 2010-05-22 12:48:52 +00:00
TODO
translate.c sparc64: fix pstate privilege bits 2010-05-22 12:48:52 +00:00