2be3bc02dd
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@568 c046a42c-6fe2-441c-8c8c-71466251a162
43 lines
1.5 KiB
Plaintext
43 lines
1.5 KiB
Plaintext
short term:
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----------
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- XP install bug fix
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- L4 Pistachio kernel boot fix
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- TLB code protection support for PPC
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- add sysenter/sysexit and fxsr for L4 pistachio 686
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- basic VGA optimizations
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- disable SMC handling for ARM/SPARC/PPC
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- see undefined flags for BTx insn
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- user/kernel PUSHL/POPL in helper.c
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- keyboard output buffer filling timing emulation
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- verify tb_flush() with a20 and TLBs
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- cmos clock update and timers
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- test ldt limit < 7 ?
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- tests for each target CPU
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- fix CCOP optimisation
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- fix all remaining thread lock issues (must put TBs in a specific invalid
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state, find a solution for tb_flush()).
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- fix arm fpu rounding (at least for float->integer conversions)
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- SMP support
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lower priority:
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--------------
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- suppress shift_mem ops
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- fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
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- sysenter/sysexit emulation
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- optimize FPU operations (evaluate x87 stack pointer statically) and
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fix cr0.TS emulation
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- add IPC syscalls
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- use -msoft-float on ARM
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- use kernel traps for unaligned accesses on ARM ?
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- handle rare page fault cases (in particular if page fault in heplers or
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in syscall emulation code).
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- fix thread stack freeing (use kernel 2.5.x CLONE_CHILD_CLEARTID)
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- more syscalls (in particular all 64 bit ones, IPCs, fix 64 bit
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issues, fix 16 bit uid issues)
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- use page_unprotect_range in every suitable syscall to handle all
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cases of self modifying code.
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- use gcc as a backend to generate better code (easy to do by using
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op-i386.c operations as local inline functions).
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- add SSE2/MMX operations
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