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qemu-e2k/target/arm
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Philippe Mathieu-Daudé dddc200dcd target/arm/cpu: Update coding style to make checkpatch.pl happy 
We will move this code in the next commit. Clean it up
first to avoid checkpatch.pl errors.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210221222617.2579610-3-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-05 15:17:35 +00:00
..
a32-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
a32.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arch_dump.c target/arm: add spaces around operator 2020-11-10 11:03:47 +00:00
arm_ldst.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arm-powerctl.c
arm-powerctl.h
cpu64.c target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU 2021-03-05 15:17:34 +00:00
cpu_tcg.c target/arm: Restrict v8M IDAU to TCG 2021-03-05 15:17:35 +00:00
cpu-param.h linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE 2021-02-16 13:06:16 +00:00
cpu-qom.h qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cpu.c target/arm/cpu: Update coding style to make checkpatch.pl happy 2021-03-05 15:17:35 +00:00
cpu.h target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe 2021-03-05 15:17:34 +00:00
crypto_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
debug_helper.c
gdbstub64.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
gdbstub.c target/arm: use official org.gnu.gdb.aarch64.sve layout for registers 2021-01-18 10:05:06 +00:00
helper-a64.c target/arm: Speed up aarch64 TBL/TBX 2021-03-05 15:17:34 +00:00
helper-a64.h target/arm: Speed up aarch64 TBL/TBX 2021-03-05 15:17:34 +00:00
helper-sve.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
helper.c target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks 2021-03-05 15:17:35 +00:00
helper.h target/arm: Fix neon VTBL/VTBX for len > 1 2020-11-10 11:03:48 +00:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe 2021-03-05 15:17:34 +00:00
iwmmxt_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
kvm64.c target/arm: do not use cc->do_interrupt for KVM directly 2021-02-05 10:24:14 -10:00
kvm_arm.h hw/arm/virt: Implement kvm-steal-time 2020-10-08 15:24:32 +01:00
kvm-consts.h target/arm: Remove no-longer-reachable 32-bit KVM code 2020-09-14 14:23:19 +01:00
kvm-stub.c
kvm.c sev/i386: Don't allow a system reset under an SEV-ES guest 2021-02-16 17:15:39 +01:00
m_helper.c target/arm/m_helper: Silence GCC 10 maybe-uninitialized error 2021-01-19 15:45:14 +00:00
m-nocp.decode target/arm: Implement new v8.1M VLLDM and VLSTM encodings 2020-12-10 11:44:56 +00:00
machine.c target/arm: Don't migrate CPUARMState.features 2021-02-11 11:50:13 +00:00
meson.build semihosting: Move ARM semihosting code to shared directories 2021-01-18 10:05:06 +00:00
monitor.c target/arm: Add cpu properties to control pauth 2021-01-19 14:38:51 +00:00
mte_helper.c target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks 2021-03-05 15:17:35 +00:00
neon_helper.c
neon-dp.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
neon-ls.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
neon-shared.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
op_addsub.h
op_helper.c target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate 2021-02-11 11:50:14 +00:00
pauth_helper.c target/arm: Implement an IMPDEF pauth algorithm 2021-01-19 14:38:51 +00:00
psci.c
sve_helper.c target/arm: Update REV, PUNPK for pred_desc 2021-01-19 14:38:53 +00:00
sve.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
syndrome.h target/arm: Split out syndrome.h from internals.h 2021-02-16 13:16:18 +00:00
t16.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
t32.decode target/arm: Implement M-profile "minimal RAS implementation" 2020-12-10 11:44:56 +00:00
tlb_helper.c linux-user/aarch64: Pass syndrome to EXC_*_ABORT 2021-02-16 13:16:56 +00:00
trace-events
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate-a64.c target/arm: Speed up aarch64 TBL/TBX 2021-03-05 15:17:34 +00:00
translate-a64.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
translate-neon.c.inc arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
translate-sve.c target/arm: Update REV, PUNPK for pred_desc 2021-01-19 14:38:53 +00:00
translate-vfp.c.inc target/arm: Implement FPCXT_NS fp system register 2021-01-08 15:13:38 +00:00
translate.c target/arm: Implement SCR_EL2.EEL2 2021-01-19 14:38:52 +00:00
translate.h target/arm: Rearrange {sve,fp}_check_access assert 2020-08-28 10:02:47 +01:00
vec_helper.c target/arm: Speed up aarch64 TBL/TBX 2021-03-05 15:17:34 +00:00
vec_internal.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
vfp_helper.c target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension 2020-10-20 16:12:01 +01:00
vfp-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
vfp.decode target/arm: Implement VLDR/VSTR system register 2020-12-10 11:44:55 +00:00