Nathan Whitehorn 2e06214f22 PPC: Add PIR register to POWER7 CPU ... The POWER7 emulation is missing the Processor Identification Register, mandatory in recent POWER CPUs, that is required for SMP on at least some operating systems (e.g. FreeBSD) to function properly. This patch copies the existing PIR code from the other CPUs that implement it. Signed-off-by: Nathan Whitehorn <nwhitehorn@freebsd.org> Signed-off-by: Alexander Graf <agraf@suse.de>		2012-03-15 13:12:11 +01:00
..
cpu.h	PPC64: Add support for ldbrx and stdbrx instructions	2012-03-15 13:12:11 +01:00
helper_regs.h
helper.c	target-ppc: Don't overuse CPUState	2012-03-14 22:20:25 +01:00
helper.h	PPC: E500: Implement msgsnd	2012-02-02 02:47:47 +01:00
kvm_ppc.c
kvm_ppc.h	target-ppc: Don't overuse CPUState	2012-03-14 22:20:25 +01:00
kvm.c	pseries: Don't try to munmap() a malloc()ed TCE table	2012-03-15 13:12:11 +01:00
machine.c	target-ppc: Don't overuse CPUState	2012-03-14 22:20:25 +01:00
mfrom_table_gen.c
mfrom_table.c
op_helper.c	target-ppc: Don't overuse CPUState	2012-03-14 22:20:25 +01:00
STATUS
translate_init.c	PPC: Add PIR register to POWER7 CPU	2012-03-15 13:12:11 +01:00
translate.c	PPC64: Add support for ldbrx and stdbrx instructions	2012-03-15 13:12:11 +01:00