Francisco Iglesias 2e1cf2c968 xilinx_spips: Don't set TX FIFO UNDERFLOW at cmd done ... Don't set TX FIFO UNDERFLOW interrupt after transmitting the commands. Also update interrupts after reading out the interrupt status. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20171126231634.9531-12-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2017-12-13 17:59:22 +00:00
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aspeed_smc.c	aspeed/smc: use a modulo to check segment limits	2017-02-10 17:40:30 +00:00
imx_spi.c	hw/ssi/imx_spi.c: Remove MSGDATA register support	2017-01-09 11:50:23 +00:00
Makefile.objs	msf2: Add Smartfusion2 SPI controller	2017-09-21 16:36:56 +01:00
mss-spi.c	msf2: Remove dead code reported by Coverity	2017-10-31 11:50:51 +00:00
omap_spi.c	arm devices: Clean up includes	2016-01-29 15:07:25 +00:00
pl022.c	hw: explicitly include qemu/log.h	2016-05-19 16:42:29 +02:00
ssi.c	ssi: change ssi_slave_init to be a realize ops	2016-07-04 13:15:22 +01:00
stm32f2xx_spi.c	STM32F2xx: Add the SPI device	2016-10-04 13:28:07 +01:00
xilinx_spi.c	arm: Clean up includes	2016-01-29 15:07:23 +00:00
xilinx_spips.c	xilinx_spips: Don't set TX FIFO UNDERFLOW at cmd done	2017-12-13 17:59:22 +00:00