dbb1fb277c
According to the ARM ARM we weren't correctly flushing the TLB entries where bits 63:56 didn't match bit 55 of the virtual address. This exposed a problem when we switched QEMU's internal TARGET_PAGE_BITS to 12 for aarch64. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1406733627-24255-3-git-send-email-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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arm_ldst.h | ||
arm-semi.c | ||
cpu64.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
crypto_helper.c | ||
gdbstub64.c | ||
gdbstub.c | ||
helper-a64.c | ||
helper-a64.h | ||
helper.c | ||
helper.h | ||
internals.h | ||
iwmmxt_helper.c | ||
kvm32.c | ||
kvm64.c | ||
kvm_arm.h | ||
kvm-consts.h | ||
kvm-stub.c | ||
kvm.c | ||
machine.c | ||
Makefile.objs | ||
neon_helper.c | ||
op_addsub.h | ||
op_helper.c | ||
translate-a64.c | ||
translate.c | ||
translate.h |