Leon Alrae 2fb58b7374 target-mips: add RI and XI fields to TLB entry ... In Revision 3 of the architecture, the RI and XI bits were added to the TLB to enable more secure access of memory pages. These bits (along with the Dirty bit) allow the implementation of read-only, write-only, no-execute access policies for mapped pages. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>		2014-11-03 11:48:34 +00:00
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Makefile.objs	target-mips: Enable KVM support in build system	2014-06-18 16:59:37 +02:00
TODO	target-mips: Change TODO file	2012-10-31 21:37:24 +01:00
cpu-qom.h	target-mips: Use cpu_exec_interrupt qom hook	2014-09-25 18:54:22 +01:00
cpu.c	gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag	2014-10-06 14:25:43 +01:00
cpu.h	target-mips: add RI and XI fields to TLB entry	2014-11-03 11:48:34 +00:00
dsp_helper.c	target-mips/dsp_helper.c: Add ifdef guards around various functions	2014-10-14 13:29:14 +01:00
gdbstub.c	cpu: Introduce CPUClass::gdb_{read,write}_register()	2013-07-27 00:04:17 +02:00
helper.c	target-mips: add RI and XI fields to TLB entry	2014-11-03 11:48:34 +00:00
helper.h	target-mips: add new Floating Point Comparison instructions	2014-10-14 13:28:52 +01:00
kvm.c	mips/kvm: Disable FPU on reset with KVM	2014-07-09 18:17:04 +02:00
kvm_mips.h	target-mips: kvm: Add main KVM support for MIPS	2014-06-18 16:58:52 +02:00
lmi_helper.c	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
machine.c	target-mips: implement UserLocal Register	2014-06-18 18:10:47 +02:00
mips-defs.h	target-mips: define ISA_MIPS64R6	2014-10-13 12:38:24 +01:00
op_helper.c	target-mips: add RI and XI fields to TLB entry	2014-11-03 11:48:34 +00:00
translate.c	target-mips: add KScratch registers	2014-11-03 11:48:34 +00:00
translate_init.c	target-mips: define a new generic CPU supporting MIPS64 Release 6 ISA	2014-10-14 13:28:52 +01:00