qemu-e2k/target
Suraj Jitindar Singh 31b2b0f846 target/ppc: Flush TLB on write to PIDR
The PIDR (process id register) is used to store the id of the currently
running process, which is used to select the process table entry used to
perform address translation. This means that when we write to this register
all the translations in the TLB become outdated as they are for a
previously running process. Thus when this register is written to we need
to invalidate the TLB entries to ensure stale entries aren't used to
to perform translation for the new process, which would result in at best
segfaults or alternatively just random memory being accessed.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Fixed compile error for 32-bit targets]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-04-26 12:41:56 +10:00
..
alpha qemu-timer: do not include sysemu/cpus.h from util/qemu-timer.h 2017-03-14 13:28:18 +01:00
arm arm: Remove workarounds for old M-profile exception return implementation 2017-04-20 17:39:17 +01:00
cris
hppa
i386 target/i386/misc_helper: wrap BQL around another IRQ generator 2017-04-10 10:14:50 +01:00
lm32
m68k
microblaze
mips target/mips: fix delay slot detection in gen_msa_branch() 2017-03-20 11:19:14 +00:00
moxie
nios2 target/nios2: take BQL around interrupt check 2017-03-14 13:26:37 +01:00
openrisc
ppc target/ppc: Flush TLB on write to PIDR 2017-04-26 12:41:56 +10:00
s390x s390x/misc_helper.c: wrap s390_virtio_hypercall in BQL 2017-04-25 13:39:43 +02:00
sh4
sparc
tilegx
tricore
unicore32
xtensa target/xtensa fixes for 2.9: 2017-03-18 17:24:49 +00:00