qemu-e2k/target-sparc/exec.h
Igor Kovalenko 5210977a85 sparc64: trap handling corrections
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote:
> On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote:
>> Good trap handling is required to process interrupts.
>>  This patch fixes the following:
>>
>>  - sparc64 has no wim register
>>  - sparc64 has no psret register, use IE bit of pstate
>>   extract IE checking code to cpu_interrupts_enabled
>>  - alternate globals are not available if cpu has GL feature
>>   in this case bit AG of pstate is constant zero
>>  - write to pstate must actually write pstate
>>   even if cpu has GL feature
>>
>>  Also timer interrupt is handled using do_interrupt.
>
> A bit too much for one patch. Please also remove the code instead of
> commenting out.

I now excluded timer interrupt related part.
To my mind other changes are essentially tied together.

> PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32.

Fixed, please find attached the updated version.

--
Kind regards,
Igor V. Kovalenko
2009-07-12 08:46:54 +00:00

58 lines
977 B
C

#ifndef EXEC_SPARC_H
#define EXEC_SPARC_H 1
#include "config.h"
#include "dyngen-exec.h"
register struct CPUSPARCState *env asm(AREG0);
#define DT0 (env->dt0)
#define DT1 (env->dt1)
#define QT0 (env->qt0)
#define QT1 (env->qt1)
#include "cpu.h"
#include "exec-all.h"
static inline void env_to_regs(void)
{
}
static inline void regs_to_env(void)
{
}
/* op_helper.c */
void do_interrupt(CPUState *env);
static inline int cpu_interrupts_enabled(CPUState *env1)
{
#if !defined (TARGET_SPARC64)
if (env1->psret != 0)
return 1;
#else
if (env1->pstate & PS_IE)
return 1;
#endif
return 0;
}
static inline int cpu_has_work(CPUState *env1)
{
return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_interrupts_enabled(env1);
}
static inline int cpu_halted(CPUState *env1) {
if (!env1->halted)
return 0;
if (cpu_has_work(env1)) {
env1->halted = 0;
return 0;
}
return EXCP_HALTED;
}
#endif