qemu-e2k

History

Alexandre Raymond dfa5294fce Remove warning in printf due to type mismatch ----8<---- qemu/target-lm32/translate.c: In function ‘gen_intermediate_code_internal’: qemu/target-lm32/translate.c:1135: warning: format ‘%zd’ expects type ‘signed size_t’, but argument 4 has type ‘int’ ----8<---- Both gen_opc_ptr and gen_opc_buf are "uint16_t *". The difference between pointers is a ptrdiff_t so printf needs '%td'. Signed-off-by: Alexandre Raymond <cerbere@gmail.com> Acked-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Andreas Färber <andreas.faerber@web.de>		2011-06-14 03:08:57 +02:00
..
cpu.h
exec.h
helper.c	lm32: fix exception handling	2011-05-03 10:48:40 +02:00
helper.h
machine.c
op_helper.c	Remove unused function parameter from cpu_restore_state	2011-04-20 10:37:03 +02:00
README
TODO
translate.c	Remove warning in printf due to type mismatch	2011-06-14 03:08:57 +02:00

README

LatticeMico32 target
--------------------

General
-------
All opcodes including the JUART CSRs are supported.


JTAG UART
---------
JTAG UART is routed to a serial console device. For the current boards it
is the second one. Ie to enable it in the qemu virtual console window use
the following command line parameters:
  -serial vc -serial vc
This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
available as virtual consoles.


Programmatically terminate the emulator
----------------------------------------
Originally neither the LatticeMico32 nor its peripherals support a
mechanism to shut down the machine. Emulation aware programs can write to a
to a special register within the system control block to shut down the
virtual machine.  For more details see hw/lm32_sys.c. The lm32-evr is the
first BSP which instantiate this model. A (32 bit) write to 0xfff0000
causes a vm shutdown.


Special instructions
--------------------
The translation recognizes one special instruction to halt the cpu:
  and r0, r0, r0
On real hardware this instruction is a nop. It is not used by GCC and
should (hopefully) not be used within hand-crafted assembly.
Insert this instruction in your idle loop to reduce the cpu load on the
host.


Ignoring the MSB of the address bus
-----------------------------------
Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
0x80000000-0xffffffff is not cached and used to access IO devices. This
behaviour can be enabled with:
  cpu_lm32_set_phys_msb_ignore(env, 1);