07f334d89d
This is the initial implementation of Shakti UART. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210401181457.73039-4-vijai@behindbytes.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
75 lines
2.4 KiB
C
75 lines
2.4 KiB
C
/*
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* SHAKTI UART
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*
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* Copyright (c) 2021 Vijai Kumar K <vijai@behindbytes.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_SHAKTI_UART_H
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#define HW_SHAKTI_UART_H
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#include "hw/sysbus.h"
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#include "chardev/char-fe.h"
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#define SHAKTI_UART_BAUD 0x00
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#define SHAKTI_UART_TX 0x04
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#define SHAKTI_UART_RX 0x08
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#define SHAKTI_UART_STATUS 0x0C
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#define SHAKTI_UART_DELAY 0x10
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#define SHAKTI_UART_CONTROL 0x14
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#define SHAKTI_UART_INT_EN 0x18
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#define SHAKTI_UART_IQ_CYCLES 0x1C
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#define SHAKTI_UART_RX_THRES 0x20
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#define SHAKTI_UART_STATUS_TX_EMPTY (1 << 0)
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#define SHAKTI_UART_STATUS_TX_FULL (1 << 1)
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#define SHAKTI_UART_STATUS_RX_NOT_EMPTY (1 << 2)
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#define SHAKTI_UART_STATUS_RX_FULL (1 << 3)
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/* 9600 8N1 is the default setting */
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/* Reg value = (50000000 Hz)/(16 * 9600)*/
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#define SHAKTI_UART_BAUD_DEFAULT 0x0145
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#define SHAKTI_UART_CONTROL_DEFAULT 0x0100
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#define TYPE_SHAKTI_UART "shakti-uart"
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#define SHAKTI_UART(obj) \
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OBJECT_CHECK(ShaktiUartState, (obj), TYPE_SHAKTI_UART)
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typedef struct {
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/* <private> */
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SysBusDevice parent_obj;
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/* <public> */
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MemoryRegion mmio;
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uint32_t uart_baud;
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uint32_t uart_tx;
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uint32_t uart_rx;
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uint32_t uart_status;
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uint32_t uart_delay;
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uint32_t uart_control;
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uint32_t uart_interrupt;
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uint32_t uart_iq_cycles;
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uint32_t uart_rx_threshold;
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CharBackend chr;
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} ShaktiUartState;
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#endif /* HW_SHAKTI_UART_H */
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