2e0d91513d
Reuse the decodetree based disassembler from target/loongarch/ for tcg/loongarch64/. The generation of decode-insns.c.inc into ./libcommon.fa.p/ could eventually result in conflict, if any other host requires the same trick, but this is good enough for now. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
399 lines
11 KiB
C
399 lines
11 KiB
C
/* General "disassemble this chunk" code. Used for debugging. */
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#include "qemu/osdep.h"
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#include "disas/dis-asm.h"
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#include "elf.h"
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#include "qemu/qemu-print.h"
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#include "disas/disas.h"
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#include "disas/capstone.h"
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typedef struct CPUDebug {
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struct disassemble_info info;
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CPUState *cpu;
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} CPUDebug;
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/* Filled in by elfload.c. Simplistic, but will do for now. */
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struct syminfo *syminfos = NULL;
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/*
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* Get LENGTH bytes from info's buffer, at host address memaddr.
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* Transfer them to myaddr.
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*/
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static int host_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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struct disassemble_info *info)
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{
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if (memaddr < info->buffer_vma
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|| memaddr + length > info->buffer_vma + info->buffer_length) {
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/* Out of bounds. Use EIO because GDB uses it. */
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return EIO;
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}
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memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
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return 0;
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}
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/*
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* Get LENGTH bytes from info's buffer, at target address memaddr.
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* Transfer them to myaddr.
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*/
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static int target_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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struct disassemble_info *info)
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{
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CPUDebug *s = container_of(info, CPUDebug, info);
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int r = cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
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return r ? EIO : 0;
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}
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/*
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* Print an error message. We can assume that this is in response to
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* an error return from {host,target}_read_memory.
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*/
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static void perror_memory(int status, bfd_vma memaddr,
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struct disassemble_info *info)
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{
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if (status != EIO) {
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/* Can't happen. */
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info->fprintf_func(info->stream, "Unknown error %d\n", status);
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} else {
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/* Address between memaddr and memaddr + len was out of bounds. */
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info->fprintf_func(info->stream,
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"Address 0x%" PRIx64 " is out of bounds.\n",
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memaddr);
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}
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}
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/* Print address in hex. */
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static void print_address(bfd_vma addr, struct disassemble_info *info)
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{
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info->fprintf_func(info->stream, "0x%" PRIx64, addr);
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}
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/* Print address in hex, truncated to the width of a host virtual address. */
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static void host_print_address(bfd_vma addr, struct disassemble_info *info)
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{
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print_address((uintptr_t)addr, info);
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}
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/* Stub prevents some fruitless earching in optabs disassemblers. */
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static int symbol_at_address(bfd_vma addr, struct disassemble_info *info)
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{
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return 1;
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}
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static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
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const char *prefix)
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{
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int i, n = info->buffer_length;
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g_autofree uint8_t *buf = g_malloc(n);
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if (info->read_memory_func(pc, buf, n, info) == 0) {
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for (i = 0; i < n; ++i) {
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if (i % 32 == 0) {
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info->fprintf_func(info->stream, "\n%s: ", prefix);
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}
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info->fprintf_func(info->stream, "%02x", buf[i]);
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}
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} else {
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info->fprintf_func(info->stream, "unable to read memory");
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}
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return n;
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}
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static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
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{
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return print_insn_objdump(pc, info, "OBJD-H");
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}
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static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
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{
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return print_insn_objdump(pc, info, "OBJD-T");
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}
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static void initialize_debug(CPUDebug *s)
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{
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memset(s, 0, sizeof(*s));
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s->info.arch = bfd_arch_unknown;
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s->info.cap_arch = -1;
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s->info.cap_insn_unit = 4;
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s->info.cap_insn_split = 4;
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s->info.memory_error_func = perror_memory;
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s->info.symbol_at_address_func = symbol_at_address;
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}
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static void initialize_debug_target(CPUDebug *s, CPUState *cpu)
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{
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initialize_debug(s);
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s->cpu = cpu;
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s->info.read_memory_func = target_read_memory;
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s->info.print_address_func = print_address;
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#if TARGET_BIG_ENDIAN
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s->info.endian = BFD_ENDIAN_BIG;
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#else
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s->info.endian = BFD_ENDIAN_LITTLE;
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#endif
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CPUClass *cc = CPU_GET_CLASS(cpu);
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if (cc->disas_set_info) {
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cc->disas_set_info(cpu, &s->info);
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}
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}
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static void initialize_debug_host(CPUDebug *s)
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{
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initialize_debug(s);
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s->info.read_memory_func = host_read_memory;
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s->info.print_address_func = host_print_address;
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#if HOST_BIG_ENDIAN
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s->info.endian = BFD_ENDIAN_BIG;
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#else
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s->info.endian = BFD_ENDIAN_LITTLE;
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#endif
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#if defined(CONFIG_TCG_INTERPRETER)
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s->info.print_insn = print_insn_tci;
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#elif defined(__i386__)
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s->info.mach = bfd_mach_i386_i386;
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s->info.cap_arch = CS_ARCH_X86;
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s->info.cap_mode = CS_MODE_32;
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s->info.cap_insn_unit = 1;
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s->info.cap_insn_split = 8;
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#elif defined(__x86_64__)
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s->info.mach = bfd_mach_x86_64;
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s->info.cap_arch = CS_ARCH_X86;
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s->info.cap_mode = CS_MODE_64;
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s->info.cap_insn_unit = 1;
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s->info.cap_insn_split = 8;
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#elif defined(_ARCH_PPC)
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s->info.cap_arch = CS_ARCH_PPC;
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# ifdef _ARCH_PPC64
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s->info.cap_mode = CS_MODE_64;
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# endif
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#elif defined(__riscv) && defined(CONFIG_RISCV_DIS)
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#if defined(_ILP32) || (__riscv_xlen == 32)
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s->info.print_insn = print_insn_riscv32;
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#elif defined(_LP64)
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s->info.print_insn = print_insn_riscv64;
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#else
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#error unsupported RISC-V ABI
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#endif
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#elif defined(__aarch64__)
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s->info.cap_arch = CS_ARCH_ARM64;
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#elif defined(__alpha__)
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s->info.print_insn = print_insn_alpha;
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#elif defined(__sparc__)
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s->info.print_insn = print_insn_sparc;
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s->info.mach = bfd_mach_sparc_v9b;
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#elif defined(__arm__)
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/* TCG only generates code for arm mode. */
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s->info.cap_arch = CS_ARCH_ARM;
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#elif defined(__MIPSEB__)
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s->info.print_insn = print_insn_big_mips;
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#elif defined(__MIPSEL__)
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s->info.print_insn = print_insn_little_mips;
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#elif defined(__m68k__)
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s->info.print_insn = print_insn_m68k;
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#elif defined(__s390__)
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s->info.cap_arch = CS_ARCH_SYSZ;
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s->info.cap_insn_unit = 2;
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s->info.cap_insn_split = 6;
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#elif defined(__hppa__)
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s->info.print_insn = print_insn_hppa;
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#elif defined(__loongarch__)
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s->info.print_insn = print_insn_loongarch;
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#endif
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}
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/* Disassemble this for me please... (debugging). */
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void target_disas(FILE *out, CPUState *cpu, target_ulong code,
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target_ulong size)
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{
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target_ulong pc;
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int count;
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CPUDebug s;
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initialize_debug_target(&s, cpu);
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s.info.fprintf_func = fprintf;
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s.info.stream = out;
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s.info.buffer_vma = code;
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s.info.buffer_length = size;
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if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {
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return;
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}
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if (s.info.print_insn == NULL) {
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s.info.print_insn = print_insn_od_target;
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}
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for (pc = code; size > 0; pc += count, size -= count) {
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fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
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count = s.info.print_insn(pc, &s.info);
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fprintf(out, "\n");
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if (count < 0)
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break;
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if (size < count) {
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fprintf(out,
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"Disassembler disagrees with translator over instruction "
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"decoding\n"
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"Please report this to qemu-devel@nongnu.org\n");
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break;
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}
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}
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}
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static int G_GNUC_PRINTF(2, 3)
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gstring_printf(FILE *stream, const char *fmt, ...)
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{
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/* We abuse the FILE parameter to pass a GString. */
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GString *s = (GString *)stream;
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int initial_len = s->len;
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va_list va;
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va_start(va, fmt);
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g_string_append_vprintf(s, fmt, va);
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va_end(va);
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return s->len - initial_len;
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}
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static void plugin_print_address(bfd_vma addr, struct disassemble_info *info)
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{
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/* does nothing */
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}
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/*
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* We should only be dissembling one instruction at a time here. If
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* there is left over it usually indicates the front end has read more
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* bytes than it needed.
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*/
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char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size)
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{
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CPUDebug s;
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GString *ds = g_string_new(NULL);
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initialize_debug_target(&s, cpu);
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s.info.fprintf_func = gstring_printf;
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s.info.stream = (FILE *)ds; /* abuse this slot */
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s.info.buffer_vma = addr;
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s.info.buffer_length = size;
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s.info.print_address_func = plugin_print_address;
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if (s.info.cap_arch >= 0 && cap_disas_plugin(&s.info, addr, size)) {
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; /* done */
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} else if (s.info.print_insn) {
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s.info.print_insn(addr, &s.info);
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} else {
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; /* cannot disassemble -- return empty string */
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}
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/* Return the buffer, freeing the GString container. */
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return g_string_free(ds, false);
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}
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/* Disassemble this for me please... (debugging). */
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void disas(FILE *out, const void *code, unsigned long size)
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{
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uintptr_t pc;
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int count;
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CPUDebug s;
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initialize_debug_host(&s);
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s.info.fprintf_func = fprintf;
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s.info.stream = out;
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s.info.buffer = code;
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s.info.buffer_vma = (uintptr_t)code;
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s.info.buffer_length = size;
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if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {
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return;
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}
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if (s.info.print_insn == NULL) {
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s.info.print_insn = print_insn_od_host;
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}
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for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
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fprintf(out, "0x%08" PRIxPTR ": ", pc);
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count = s.info.print_insn(pc, &s.info);
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fprintf(out, "\n");
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if (count < 0) {
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break;
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}
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}
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}
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/* Look up symbol for debugging purpose. Returns "" if unknown. */
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const char *lookup_symbol(target_ulong orig_addr)
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{
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const char *symbol = "";
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struct syminfo *s;
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for (s = syminfos; s; s = s->next) {
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symbol = s->lookup_symbol(s, orig_addr);
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if (symbol[0] != '\0') {
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break;
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}
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}
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return symbol;
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}
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#if !defined(CONFIG_USER_ONLY)
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#include "monitor/monitor.h"
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static int
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physical_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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struct disassemble_info *info)
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{
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CPUDebug *s = container_of(info, CPUDebug, info);
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MemTxResult res;
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res = address_space_read(s->cpu->as, memaddr, MEMTXATTRS_UNSPECIFIED,
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myaddr, length);
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return res == MEMTX_OK ? 0 : EIO;
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}
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/* Disassembler for the monitor. */
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void monitor_disas(Monitor *mon, CPUState *cpu,
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target_ulong pc, int nb_insn, int is_physical)
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{
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int count, i;
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CPUDebug s;
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g_autoptr(GString) ds = g_string_new("");
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initialize_debug_target(&s, cpu);
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s.info.fprintf_func = gstring_printf;
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s.info.stream = (FILE *)ds; /* abuse this slot */
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if (is_physical) {
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s.info.read_memory_func = physical_read_memory;
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}
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s.info.buffer_vma = pc;
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if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) {
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monitor_puts(mon, ds->str);
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return;
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}
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if (!s.info.print_insn) {
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monitor_printf(mon, "0x" TARGET_FMT_lx
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": Asm output not supported on this arch\n", pc);
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return;
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}
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for (i = 0; i < nb_insn; i++) {
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g_string_append_printf(ds, "0x" TARGET_FMT_lx ": ", pc);
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count = s.info.print_insn(pc, &s.info);
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g_string_append_c(ds, '\n');
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if (count < 0) {
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break;
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}
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pc += count;
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}
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monitor_puts(mon, ds->str);
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}
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#endif
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