614f104dfd
Delegate TCG temp_buf setup to targets, so that they can use a stack frame later instead. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
164 lines
4.2 KiB
C
164 lines
4.2 KiB
C
/*
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* Host code generation
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdarg.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "config.h"
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#define NO_CPU_IO_DEFS
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#include "cpu.h"
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#include "disas.h"
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#include "tcg.h"
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#include "qemu-timer.h"
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/* code generation context */
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TCGContext tcg_ctx;
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uint16_t gen_opc_buf[OPC_BUF_SIZE];
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TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
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target_ulong gen_opc_pc[OPC_BUF_SIZE];
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uint16_t gen_opc_icount[OPC_BUF_SIZE];
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uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
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void cpu_gen_init(void)
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{
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tcg_context_init(&tcg_ctx);
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}
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/* return non zero if the very first instruction is invalid so that
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the virtual CPU can trigger an exception.
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'*gen_code_size_ptr' contains the size of the generated code (host
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code).
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*/
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int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
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{
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TCGContext *s = &tcg_ctx;
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uint8_t *gen_code_buf;
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int gen_code_size;
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#ifdef CONFIG_PROFILER
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int64_t ti;
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#endif
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#ifdef CONFIG_PROFILER
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s->tb_count1++; /* includes aborted translations because of
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exceptions */
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ti = profile_getclock();
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#endif
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tcg_func_start(s);
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gen_intermediate_code(env, tb);
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/* generate machine code */
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gen_code_buf = tb->tc_ptr;
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tb->tb_next_offset[0] = 0xffff;
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tb->tb_next_offset[1] = 0xffff;
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s->tb_next_offset = tb->tb_next_offset;
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#ifdef USE_DIRECT_JUMP
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s->tb_jmp_offset = tb->tb_jmp_offset;
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s->tb_next = NULL;
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#else
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s->tb_jmp_offset = NULL;
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s->tb_next = tb->tb_next;
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#endif
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#ifdef CONFIG_PROFILER
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s->tb_count++;
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s->interm_time += profile_getclock() - ti;
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s->code_time -= profile_getclock();
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#endif
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gen_code_size = tcg_gen_code(s, gen_code_buf);
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*gen_code_size_ptr = gen_code_size;
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#ifdef CONFIG_PROFILER
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s->code_time += profile_getclock();
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s->code_in_len += tb->size;
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s->code_out_len += gen_code_size;
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#endif
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#ifdef DEBUG_DISAS
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if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
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qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
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log_disas(tb->tc_ptr, *gen_code_size_ptr);
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qemu_log("\n");
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qemu_log_flush();
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}
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#endif
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return 0;
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}
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/* The cpu state corresponding to 'searched_pc' is restored.
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*/
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int cpu_restore_state(TranslationBlock *tb,
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CPUState *env, unsigned long searched_pc)
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{
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TCGContext *s = &tcg_ctx;
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int j;
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unsigned long tc_ptr;
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#ifdef CONFIG_PROFILER
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int64_t ti;
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#endif
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#ifdef CONFIG_PROFILER
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ti = profile_getclock();
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#endif
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tcg_func_start(s);
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gen_intermediate_code_pc(env, tb);
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if (use_icount) {
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/* Reset the cycle counter to the start of the block. */
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env->icount_decr.u16.low += tb->icount;
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/* Clear the IO flag. */
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env->can_do_io = 0;
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}
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/* find opc index corresponding to search_pc */
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tc_ptr = (unsigned long)tb->tc_ptr;
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if (searched_pc < tc_ptr)
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return -1;
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s->tb_next_offset = tb->tb_next_offset;
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#ifdef USE_DIRECT_JUMP
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s->tb_jmp_offset = tb->tb_jmp_offset;
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s->tb_next = NULL;
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#else
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s->tb_jmp_offset = NULL;
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s->tb_next = tb->tb_next;
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#endif
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j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
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if (j < 0)
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return -1;
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/* now find start of instruction before */
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while (gen_opc_instr_start[j] == 0)
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j--;
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env->icount_decr.u16.low -= gen_opc_icount[j];
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restore_state_to_opc(env, tb, j);
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#ifdef CONFIG_PROFILER
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s->restore_time += profile_getclock() - ti;
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s->restore_count++;
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#endif
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return 0;
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}
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