qemu-e2k/target/mips
Aleksandar Markovic 373ecd3823 target/mips: Fix decoding of ALIGN and DALIGN instructions
Opcode for ALIGN and DALIGN must be in fact ranges of opcodes, to
allow paremeter 'bp' to occupy two and three bits, respectively.

Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24 15:20:32 +02:00
..
cp0_timer.c
cpu-qom.h
cpu.c
cpu.h target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
dsp_helper.c
gdbstub.c target/mips: Fix gdbstub to read/write 64 bit FP registers 2018-06-27 20:13:50 +02:00
helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
helper.h target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
internal.h target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
kvm_mips.h
kvm.c
lmi_helper.c
machine.c target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
Makefile.objs
mips-defs.h target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constants 2018-10-24 15:07:42 +02:00
mips-semi.c
msa_helper.c
op_helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
TODO
trace-events
translate_init.inc.c target/mips: Define the R5900 CPU 2018-10-24 15:20:31 +02:00
translate.c target/mips: Fix decoding of ALIGN and DALIGN instructions 2018-10-24 15:20:32 +02:00