OpenE2K/qemu-e2k
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qemu-e2k/target/i386
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Stefan Hajnoczi 4a9c04672a Cache CPUClass for use in hot code paths. 
Add CPUTLBEntryFull, probe_access_full, tlb_set_page_full.
 Add generic support for TARGET_TB_PCREL.
 tcg/ppc: Optimize 26-bit jumps using STQ for POWER 2.07
 target/sh4: Fix TB_FLAG_UNALIGN
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Merge tag 'pull-tcg-20221004' of https://gitlab.com/rth7680/qemu into staging

Cache CPUClass for use in hot code paths.
Add CPUTLBEntryFull, probe_access_full, tlb_set_page_full.
Add generic support for TARGET_TB_PCREL.
tcg/ppc: Optimize 26-bit jumps using STQ for POWER 2.07
target/sh4: Fix TB_FLAG_UNALIGN

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* tag 'pull-tcg-20221004' of https://gitlab.com/rth7680/qemu:
  target/sh4: Fix TB_FLAG_UNALIGN
  tcg/ppc: Optimize 26-bit jumps
  accel/tcg: Introduce TARGET_TB_PCREL
  accel/tcg: Introduce tb_pc and log_pc
  hw/core: Add CPUClass.get_pc
  include/hw/core: Create struct CPUJumpCache
  accel/tcg: Inline tb_flush_jmp_cache
  accel/tcg: Do not align tb->page_addr[0]
  accel/tcg: Use DisasContextBase in plugin_gen_tb_start
  accel/tcg: Use bool for page_find_alloc
  accel/tcg: Remove PageDesc code_bitmap
  include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA
  accel/tcg: Introduce tlb_set_page_full
  accel/tcg: Introduce probe_access_full
  accel/tcg: Suppress auto-invalidate in probe_access_internal
  accel/tcg: Drop addr member from SavedIOTLB
  accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull
  cputlb: used cached CPUClass in our hot-paths
  hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs
  cpu: cache CPUClass in CPUState for hot code paths

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-10-05 10:17:02 -04:00
..
hax Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
hvf hvf: Enable RDTSCP support 2022-07-13 00:05:39 +02:00
kvm Pull request trivial patches branch 20220930-v2 2022-10-04 14:04:18 -04:00
nvmm Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
tcg accel/tcg: Introduce tb_pc and log_pc 2022-10-04 12:13:12 -07:00
whpx Drop superfluous conditionals around g_free() 2022-10-04 00:10:11 +02:00
arch_dump.c
arch_memory_mapping.c
cpu-dump.c
cpu-internal.h
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu-sysemu.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
cpu.c hw/core: Add CPUClass.get_pc 2022-10-04 12:13:12 -07:00
cpu.h i386: Hyper-V Direct TLB flush hypercall 2022-05-25 21:26:35 +02:00
gdbstub.c target/i386: fix byte swap issue with XMM register access 2022-04-20 16:04:20 +01:00
helper.c * Improve virtio-net failover test 2022-02-22 13:07:32 +00:00
helper.h
host-cpu.c
host-cpu.h
Kconfig
machine.c target/i386: Enable Arch LBR migration states in vmstate 2022-05-14 12:32:41 +02:00
meson.build
monitor.c
ops_sse_header.h target/i386: fix INSERTQ implementation 2022-09-19 15:16:00 +02:00
ops_sse.h target/i386: fix INSERTQ implementation 2022-09-19 15:16:00 +02:00
sev-sysemu-stub.c
sev.c qapi, target/i386/sev: Add cpu0-id to query-sev-capabilities 2022-04-06 10:50:37 +02:00
sev.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
shift_helper_template.h
svm.h
trace-events
trace.h
xsave_helper.c x86: add support for KVM_CAP_XSAVE2 and AMX state migration 2022-03-15 11:50:50 +01:00