45e077d751
split up the CpusAccel tcg_cpus into three TCG variants: tcg_cpus_rr (single threaded, round robin cpus) tcg_cpus_icount (same as rr, but with instruction counting enabled) tcg_cpus_mttcg (multi-threaded cpus) Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201015143217.29337-2-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
18 lines
451 B
C
18 lines
451 B
C
/*
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* QEMU TCG Single Threaded vCPUs implementation using instruction counting
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*
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* Copyright 2020 SUSE LLC
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef TCG_CPUS_ICOUNT_H
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#define TCG_CPUS_ICOUNT_H
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void handle_icount_deadline(void);
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void prepare_icount_for_run(CPUState *cpu);
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void process_icount_data(CPUState *cpu);
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#endif /* TCG_CPUS_ICOUNT_H */
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