3b2e934463
The Application Interrupt and Reset Control Register has some changes for v8M: * new bits SYSRESETREQS, BFHFNMINS and PRIS: these all have real state if the security extension is implemented and otherwise are constant * the PRIGROUP field is banked between security states * non-secure code can be blocked from using the SYSRESET bit to reset the system if SYSRESETREQS is set Implement the new state and the changes to register read and write. For the moment we ignore the effects of the secure PRIGROUP. We will implement the effects of PRIS and BFHFNMIS later. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-6-git-send-email-peter.maydell@linaro.org |
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.. | ||
allwinner-a10-pic.c | ||
apic_common.c | ||
apic.c | ||
arm_gic_common.c | ||
arm_gic_kvm.c | ||
arm_gic.c | ||
arm_gicv2m.c | ||
arm_gicv3_common.c | ||
arm_gicv3_cpuif.c | ||
arm_gicv3_dist.c | ||
arm_gicv3_its_common.c | ||
arm_gicv3_its_kvm.c | ||
arm_gicv3_kvm.c | ||
arm_gicv3_redist.c | ||
arm_gicv3.c | ||
armv7m_nvic.c | ||
aspeed_vic.c | ||
bcm2835_ic.c | ||
bcm2836_control.c | ||
etraxfs_pic.c | ||
exynos4210_combiner.c | ||
exynos4210_gic.c | ||
gic_internal.h | ||
gicv3_internal.h | ||
grlib_irqmp.c | ||
heathrow_pic.c | ||
i8259_common.c | ||
i8259.c | ||
imx_avic.c | ||
intc.c | ||
ioapic_common.c | ||
ioapic.c | ||
lm32_pic.c | ||
Makefile.objs | ||
mips_gic.c | ||
nios2_iic.c | ||
omap_intc.c | ||
openpic_kvm.c | ||
openpic.c | ||
pl190.c | ||
puv3_intc.c | ||
realview_gic.c | ||
s390_flic_kvm.c | ||
s390_flic.c | ||
sh_intc.c | ||
slavio_intctl.c | ||
trace-events | ||
vgic_common.h | ||
xics_kvm.c | ||
xics_pnv.c | ||
xics_spapr.c | ||
xics.c | ||
xilinx_intc.c |