a0c4cb4a70
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1117 c046a42c-6fe2-441c-8c8c-71466251a162
987 lines
16 KiB
C
987 lines
16 KiB
C
/*
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SPARC micro operations
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Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h"
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/*XXX*/
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#define REGNAME g0
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#define REG (env->gregs[0])
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#include "op_template.h"
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#define REGNAME g1
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#define REG (env->gregs[1])
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#include "op_template.h"
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#define REGNAME g2
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#define REG (env->gregs[2])
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#include "op_template.h"
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#define REGNAME g3
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#define REG (env->gregs[3])
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#include "op_template.h"
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#define REGNAME g4
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#define REG (env->gregs[4])
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#include "op_template.h"
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#define REGNAME g5
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#define REG (env->gregs[5])
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#include "op_template.h"
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#define REGNAME g6
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#define REG (env->gregs[6])
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#include "op_template.h"
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#define REGNAME g7
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#define REG (env->gregs[7])
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#include "op_template.h"
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#define REGNAME i0
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#define REG (env->regwptr[16])
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#include "op_template.h"
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#define REGNAME i1
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#define REG (env->regwptr[17])
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#include "op_template.h"
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#define REGNAME i2
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#define REG (env->regwptr[18])
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#include "op_template.h"
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#define REGNAME i3
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#define REG (env->regwptr[19])
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#include "op_template.h"
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#define REGNAME i4
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#define REG (env->regwptr[20])
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#include "op_template.h"
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#define REGNAME i5
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#define REG (env->regwptr[21])
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#include "op_template.h"
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#define REGNAME i6
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#define REG (env->regwptr[22])
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#include "op_template.h"
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#define REGNAME i7
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#define REG (env->regwptr[23])
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#include "op_template.h"
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#define REGNAME l0
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#define REG (env->regwptr[8])
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#include "op_template.h"
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#define REGNAME l1
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#define REG (env->regwptr[9])
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#include "op_template.h"
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#define REGNAME l2
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#define REG (env->regwptr[10])
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#include "op_template.h"
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#define REGNAME l3
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#define REG (env->regwptr[11])
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#include "op_template.h"
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#define REGNAME l4
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#define REG (env->regwptr[12])
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#include "op_template.h"
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#define REGNAME l5
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#define REG (env->regwptr[13])
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#include "op_template.h"
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#define REGNAME l6
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#define REG (env->regwptr[14])
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#include "op_template.h"
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#define REGNAME l7
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#define REG (env->regwptr[15])
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#include "op_template.h"
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#define REGNAME o0
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#define REG (env->regwptr[0])
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#include "op_template.h"
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#define REGNAME o1
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#define REG (env->regwptr[1])
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#include "op_template.h"
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#define REGNAME o2
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#define REG (env->regwptr[2])
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#include "op_template.h"
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#define REGNAME o3
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#define REG (env->regwptr[3])
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#include "op_template.h"
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#define REGNAME o4
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#define REG (env->regwptr[4])
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#include "op_template.h"
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#define REGNAME o5
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#define REG (env->regwptr[5])
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#include "op_template.h"
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#define REGNAME o6
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#define REG (env->regwptr[6])
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#include "op_template.h"
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#define REGNAME o7
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#define REG (env->regwptr[7])
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#include "op_template.h"
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#define REGNAME f0
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#define REG (env->fpr[0])
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#include "fop_template.h"
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#define REGNAME f1
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#define REG (env->fpr[1])
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#include "fop_template.h"
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#define REGNAME f2
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#define REG (env->fpr[2])
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#include "fop_template.h"
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#define REGNAME f3
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#define REG (env->fpr[3])
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#include "fop_template.h"
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#define REGNAME f4
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#define REG (env->fpr[4])
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#include "fop_template.h"
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#define REGNAME f5
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#define REG (env->fpr[5])
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#include "fop_template.h"
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#define REGNAME f6
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#define REG (env->fpr[6])
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#include "fop_template.h"
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#define REGNAME f7
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#define REG (env->fpr[7])
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#include "fop_template.h"
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#define REGNAME f8
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#define REG (env->fpr[8])
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#include "fop_template.h"
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#define REGNAME f9
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#define REG (env->fpr[9])
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#include "fop_template.h"
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#define REGNAME f10
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#define REG (env->fpr[10])
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#include "fop_template.h"
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#define REGNAME f11
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#define REG (env->fpr[11])
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#include "fop_template.h"
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#define REGNAME f12
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#define REG (env->fpr[12])
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#include "fop_template.h"
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#define REGNAME f13
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#define REG (env->fpr[13])
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#include "fop_template.h"
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#define REGNAME f14
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#define REG (env->fpr[14])
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#include "fop_template.h"
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#define REGNAME f15
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#define REG (env->fpr[15])
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#include "fop_template.h"
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#define REGNAME f16
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#define REG (env->fpr[16])
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#include "fop_template.h"
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#define REGNAME f17
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#define REG (env->fpr[17])
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#include "fop_template.h"
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#define REGNAME f18
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#define REG (env->fpr[18])
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#include "fop_template.h"
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#define REGNAME f19
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#define REG (env->fpr[19])
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#include "fop_template.h"
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#define REGNAME f20
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#define REG (env->fpr[20])
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#include "fop_template.h"
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#define REGNAME f21
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#define REG (env->fpr[21])
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#include "fop_template.h"
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#define REGNAME f22
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#define REG (env->fpr[22])
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#include "fop_template.h"
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#define REGNAME f23
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#define REG (env->fpr[23])
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#include "fop_template.h"
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#define REGNAME f24
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#define REG (env->fpr[24])
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#include "fop_template.h"
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#define REGNAME f25
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#define REG (env->fpr[25])
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#include "fop_template.h"
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#define REGNAME f26
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#define REG (env->fpr[26])
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#include "fop_template.h"
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#define REGNAME f27
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#define REG (env->fpr[27])
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#include "fop_template.h"
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#define REGNAME f28
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#define REG (env->fpr[28])
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#include "fop_template.h"
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#define REGNAME f29
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#define REG (env->fpr[29])
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#include "fop_template.h"
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#define REGNAME f30
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#define REG (env->fpr[30])
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#include "fop_template.h"
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#define REGNAME f31
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#define REG (env->fpr[31])
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#include "fop_template.h"
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#define EIP (env->pc)
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#define FLAG_SET(x) (env->psr&x)?1:0
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#define FFLAG_SET(x) ((env->fsr&x)?1:0)
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void OPPROTO op_movl_T0_0(void)
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{
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T0 = 0;
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}
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void OPPROTO op_movl_T0_1(void)
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{
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T0 = 1;
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}
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void OPPROTO op_movl_T0_im(void)
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{
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T0 = PARAM1;
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}
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void OPPROTO op_movl_T1_im(void)
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{
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T1 = PARAM1;
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}
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void OPPROTO op_movl_T2_im(void)
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{
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T2 = PARAM1;
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}
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void OPPROTO op_addl_T1_im(void)
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{
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T1 += PARAM1;
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}
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void OPPROTO op_addl_T1_T2(void)
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{
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T1 += T2;
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}
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void OPPROTO op_subl_T1_T2(void)
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{
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T1 -= T2;
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}
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void OPPROTO op_add_T1_T0(void)
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{
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T0 += T1;
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}
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void OPPROTO op_add_T1_T0_cc(void)
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{
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unsigned int src1;
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src1 = T0;
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T0 += T1;
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO;
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if ((int) T0 < 0)
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env->psr |= PSR_NEG;
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if (T0 < src1)
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env->psr |= PSR_CARRY;
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if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
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env->psr |= PSR_OVF;
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FORCE_RET();
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}
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void OPPROTO op_sub_T1_T0(void)
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{
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T0 -= T1;
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}
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void OPPROTO op_sub_T1_T0_cc(void)
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{
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unsigned int src1;
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src1 = T0;
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T0 -= T1;
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO;
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if ((int) T0 < 0)
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env->psr |= PSR_NEG;
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if (src1 < T1)
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env->psr |= PSR_CARRY;
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if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
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env->psr |= PSR_OVF;
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FORCE_RET();
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}
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void OPPROTO op_and_T1_T0(void)
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{
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T0 &= T1;
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}
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void OPPROTO op_or_T1_T0(void)
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{
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T0 |= T1;
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}
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void OPPROTO op_xor_T1_T0(void)
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{
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T0 ^= T1;
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}
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void OPPROTO op_andn_T1_T0(void)
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{
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T0 &= ~T1;
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}
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void OPPROTO op_orn_T1_T0(void)
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{
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T0 |= ~T1;
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}
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void OPPROTO op_xnor_T1_T0(void)
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{
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T0 ^= ~T1;
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}
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void OPPROTO op_addx_T1_T0(void)
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{
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T0 += T1 + ((env->psr & PSR_CARRY) ? 1 : 0);
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}
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void OPPROTO op_umul_T1_T0(void)
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{
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uint64_t res;
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res = (uint64_t) T0 *(uint64_t) T1;
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T0 = res & 0xffffffff;
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env->y = res >> 32;
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}
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void OPPROTO op_smul_T1_T0(void)
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{
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uint64_t res;
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res = (int64_t) ((int32_t) T0) * (int64_t) ((int32_t) T1);
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T0 = res & 0xffffffff;
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env->y = res >> 32;
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}
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void OPPROTO op_mulscc_T1_T0(void)
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{
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unsigned int b1, N, V, b2, src1;
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N = FLAG_SET(PSR_NEG);
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V = FLAG_SET(PSR_OVF);
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b1 = N ^ V;
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b2 = T0 & 1;
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T0 = (b1 << 31) | (T0 >> 1);
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if (!(env->y & 1))
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T1 = 0;
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/* do addition and update flags */
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src1 = T0;
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T0 += T1;
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO;
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if ((int) T0 < 0)
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env->psr |= PSR_NEG;
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if (T0 < src1)
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env->psr |= PSR_CARRY;
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if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
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env->psr |= PSR_OVF;
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env->y = (b2 << 31) | (env->y >> 1);
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FORCE_RET();
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}
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void OPPROTO op_udiv_T1_T0(void)
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{
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uint64_t x0;
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uint32_t x1;
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x0 = T0 | ((uint64_t) (env->y) << 32);
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x1 = T1;
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x0 = x0 / x1;
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if (x0 > 0xffffffff) {
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T0 = 0xffffffff;
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T1 = 1;
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} else {
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T0 = x0;
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T1 = 0;
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}
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FORCE_RET();
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}
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void OPPROTO op_sdiv_T1_T0(void)
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{
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int64_t x0;
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int32_t x1;
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x0 = T0 | ((uint64_t) (env->y) << 32);
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x1 = T1;
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x0 = x0 / x1;
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if ((int32_t) x0 != x0) {
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T0 = x0 >> 63;
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T1 = 1;
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} else {
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T0 = x0;
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T1 = 0;
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}
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FORCE_RET();
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}
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void OPPROTO op_div_cc(void)
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{
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO;
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if ((int) T0 < 0)
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env->psr |= PSR_NEG;
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if (T1)
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env->psr |= PSR_OVF;
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FORCE_RET();
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}
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void OPPROTO op_subx_T1_T0(void)
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{
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T0 -= T1 + ((env->psr & PSR_CARRY) ? 1 : 0);
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}
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void OPPROTO op_logic_T0_cc(void)
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{
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO;
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if ((int) T0 < 0)
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env->psr |= PSR_NEG;
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FORCE_RET();
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}
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void OPPROTO op_set_flags(void)
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{
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO;
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if ((unsigned int) T0 < (unsigned int) T1)
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env->psr |= PSR_CARRY;
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if ((int) T0 < (int) T1)
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env->psr |= PSR_OVF;
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if ((int) T0 < 0)
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env->psr |= PSR_NEG;
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FORCE_RET();
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}
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void OPPROTO op_sll(void)
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{
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T0 <<= T1;
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}
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void OPPROTO op_srl(void)
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{
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T0 >>= T1;
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}
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void OPPROTO op_sra(void)
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{
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T0 = ((int32_t) T0) >> T1;
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}
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/* Load and store */
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#define MEMSUFFIX _raw
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#include "op_mem.h"
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_mem.h"
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#define MEMSUFFIX _kernel
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#include "op_mem.h"
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#endif
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void OPPROTO op_ldfsr(void)
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{
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env->fsr = *((uint32_t *) &FT0);
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helper_ldfsr();
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}
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void OPPROTO op_stfsr(void)
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{
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*((uint32_t *) &FT0) = env->fsr;
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}
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void OPPROTO op_wry(void)
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{
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env->y = T0;
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}
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void OPPROTO op_rdy(void)
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{
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T0 = env->y;
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}
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void OPPROTO op_rdwim(void)
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{
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T0 = env->wim;
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}
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void OPPROTO op_wrwim(void)
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{
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env->wim = T0;
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FORCE_RET();
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}
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void OPPROTO op_rdpsr(void)
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{
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T0 = GET_PSR(env);
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}
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void OPPROTO op_wrpsr(void)
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{
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int cwp;
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env->psr = T0 & ~PSR_ICC;
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env->psrs = (T0 & PSR_S)? 1 : 0;
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env->psrps = (T0 & PSR_PS)? 1 : 0;
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env->psret = (T0 & PSR_ET)? 1 : 0;
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cwp = (T0 & PSR_CWP) & (NWINDOWS - 1);
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set_cwp(cwp);
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_rdtbr(void)
|
|
{
|
|
T0 = env->tbr;
|
|
}
|
|
|
|
void OPPROTO op_wrtbr(void)
|
|
{
|
|
env->tbr = T0;
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_rett(void)
|
|
{
|
|
helper_rett();
|
|
FORCE_RET();
|
|
}
|
|
|
|
void raise_exception(int tt)
|
|
{
|
|
env->exception_index = tt;
|
|
cpu_loop_exit();
|
|
}
|
|
|
|
/* XXX: use another pointer for %iN registers to avoid slow wrapping
|
|
handling ? */
|
|
void OPPROTO op_save(void)
|
|
{
|
|
int cwp;
|
|
cwp = (env->cwp - 1) & (NWINDOWS - 1);
|
|
if (env->wim & (1 << cwp)) {
|
|
raise_exception(TT_WIN_OVF);
|
|
}
|
|
set_cwp(cwp);
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_restore(void)
|
|
{
|
|
int cwp;
|
|
cwp = (env->cwp + 1) & (NWINDOWS - 1);
|
|
if (env->wim & (1 << cwp)) {
|
|
raise_exception(TT_WIN_UNF);
|
|
}
|
|
set_cwp(cwp);
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_exception(void)
|
|
{
|
|
env->exception_index = PARAM1;
|
|
cpu_loop_exit();
|
|
}
|
|
|
|
void OPPROTO op_trap_T0(void)
|
|
{
|
|
env->exception_index = TT_TRAP + (T0 & 0x7f);
|
|
cpu_loop_exit();
|
|
}
|
|
|
|
void OPPROTO op_trapcc_T0(void)
|
|
{
|
|
if (T2) {
|
|
env->exception_index = TT_TRAP + (T0 & 0x7f);
|
|
cpu_loop_exit();
|
|
}
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_debug(void)
|
|
{
|
|
env->exception_index = EXCP_DEBUG;
|
|
cpu_loop_exit();
|
|
}
|
|
|
|
void OPPROTO op_exit_tb(void)
|
|
{
|
|
EXIT_TB();
|
|
}
|
|
|
|
void OPPROTO op_eval_be(void)
|
|
{
|
|
T2 = (env->psr & PSR_ZERO);
|
|
}
|
|
|
|
void OPPROTO op_eval_ble(void)
|
|
{
|
|
unsigned int Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
|
|
|
|
T2 = Z | (N ^ V);
|
|
}
|
|
|
|
void OPPROTO op_eval_bl(void)
|
|
{
|
|
unsigned int N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
|
|
|
|
T2 = N ^ V;
|
|
}
|
|
|
|
void OPPROTO op_eval_bleu(void)
|
|
{
|
|
unsigned int Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY);
|
|
|
|
T2 = C | Z;
|
|
}
|
|
|
|
void OPPROTO op_eval_bcs(void)
|
|
{
|
|
T2 = (env->psr & PSR_CARRY);
|
|
}
|
|
|
|
void OPPROTO op_eval_bvs(void)
|
|
{
|
|
T2 = (env->psr & PSR_OVF);
|
|
}
|
|
|
|
void OPPROTO op_eval_bneg(void)
|
|
{
|
|
T2 = (env->psr & PSR_NEG);
|
|
}
|
|
|
|
void OPPROTO op_eval_bne(void)
|
|
{
|
|
T2 = !(env->psr & PSR_ZERO);
|
|
}
|
|
|
|
void OPPROTO op_eval_bg(void)
|
|
{
|
|
unsigned int Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
|
|
|
|
T2 = !(Z | (N ^ V));
|
|
}
|
|
|
|
void OPPROTO op_eval_bge(void)
|
|
{
|
|
unsigned int N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
|
|
|
|
T2 = !(N ^ V);
|
|
}
|
|
|
|
void OPPROTO op_eval_bgu(void)
|
|
{
|
|
unsigned int Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY);
|
|
|
|
T2 = !(C | Z);
|
|
}
|
|
|
|
void OPPROTO op_eval_bcc(void)
|
|
{
|
|
T2 = !(env->psr & PSR_CARRY);
|
|
}
|
|
|
|
void OPPROTO op_eval_bpos(void)
|
|
{
|
|
T2 = !(env->psr & PSR_NEG);
|
|
}
|
|
|
|
void OPPROTO op_eval_bvc(void)
|
|
{
|
|
T2 = !(env->psr & PSR_OVF);
|
|
}
|
|
|
|
/* FCC1:FCC0: 0 =, 1 <, 2 >, 3 u */
|
|
|
|
void OPPROTO op_eval_fbne(void)
|
|
{
|
|
// !0
|
|
T2 = (env->fsr & (FSR_FCC1 | FSR_FCC0)); /* L or G or U */
|
|
}
|
|
|
|
void OPPROTO op_eval_fblg(void)
|
|
{
|
|
// 1 or 2
|
|
T2 = FFLAG_SET(FSR_FCC0) ^ FFLAG_SET(FSR_FCC1);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbul(void)
|
|
{
|
|
// 1 or 3
|
|
T2 = FFLAG_SET(FSR_FCC0);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbl(void)
|
|
{
|
|
// 1
|
|
T2 = FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbug(void)
|
|
{
|
|
// 2 or 3
|
|
T2 = FFLAG_SET(FSR_FCC1);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbg(void)
|
|
{
|
|
// 2
|
|
T2 = !FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbu(void)
|
|
{
|
|
// 3
|
|
T2 = FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbe(void)
|
|
{
|
|
// 0
|
|
T2 = !FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbue(void)
|
|
{
|
|
// 0 or 3
|
|
T2 = !(FFLAG_SET(FSR_FCC1) ^ FFLAG_SET(FSR_FCC0));
|
|
}
|
|
|
|
void OPPROTO op_eval_fbge(void)
|
|
{
|
|
// 0 or 2
|
|
T2 = !FFLAG_SET(FSR_FCC0);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbuge(void)
|
|
{
|
|
// !1
|
|
T2 = !(FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1));
|
|
}
|
|
|
|
void OPPROTO op_eval_fble(void)
|
|
{
|
|
// 0 or 1
|
|
T2 = !FFLAG_SET(FSR_FCC1);
|
|
}
|
|
|
|
void OPPROTO op_eval_fbule(void)
|
|
{
|
|
// !2
|
|
T2 = !(!FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1));
|
|
}
|
|
|
|
void OPPROTO op_eval_fbo(void)
|
|
{
|
|
// !3
|
|
T2 = !(FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1));
|
|
}
|
|
|
|
void OPPROTO op_movl_T2_0(void)
|
|
{
|
|
T2 = 0;
|
|
}
|
|
|
|
void OPPROTO op_movl_T2_1(void)
|
|
{
|
|
T2 = 1;
|
|
}
|
|
|
|
void OPPROTO op_jmp_im(void)
|
|
{
|
|
env->pc = PARAM1;
|
|
}
|
|
|
|
void OPPROTO op_movl_npc_im(void)
|
|
{
|
|
env->npc = PARAM1;
|
|
}
|
|
|
|
void OPPROTO op_movl_npc_T0(void)
|
|
{
|
|
env->npc = T0;
|
|
}
|
|
|
|
void OPPROTO op_next_insn(void)
|
|
{
|
|
env->pc = env->npc;
|
|
env->npc = env->npc + 4;
|
|
}
|
|
|
|
void OPPROTO op_branch(void)
|
|
{
|
|
env->npc = PARAM3; /* XXX: optimize */
|
|
JUMP_TB(op_branch, PARAM1, 0, PARAM2);
|
|
}
|
|
|
|
void OPPROTO op_branch2(void)
|
|
{
|
|
if (T2) {
|
|
env->npc = PARAM2 + 4;
|
|
JUMP_TB(op_branch2, PARAM1, 0, PARAM2);
|
|
} else {
|
|
env->npc = PARAM3 + 4;
|
|
JUMP_TB(op_branch2, PARAM1, 1, PARAM3);
|
|
}
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_branch_a(void)
|
|
{
|
|
if (T2) {
|
|
env->npc = PARAM2; /* XXX: optimize */
|
|
JUMP_TB(op_generic_branch_a, PARAM1, 0, PARAM3);
|
|
} else {
|
|
env->npc = PARAM3 + 8; /* XXX: optimize */
|
|
JUMP_TB(op_generic_branch_a, PARAM1, 1, PARAM3 + 4);
|
|
}
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_generic_branch(void)
|
|
{
|
|
if (T2) {
|
|
env->npc = PARAM1;
|
|
} else {
|
|
env->npc = PARAM2;
|
|
}
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_flush_T0(void)
|
|
{
|
|
helper_flush(T0);
|
|
}
|
|
|
|
void OPPROTO op_fnegs(void)
|
|
{
|
|
FT0 = -FT1;
|
|
}
|
|
|
|
void OPPROTO op_fabss(void)
|
|
{
|
|
do_fabss();
|
|
}
|
|
|
|
void OPPROTO op_fsqrts(void)
|
|
{
|
|
do_fsqrts();
|
|
}
|
|
|
|
void OPPROTO op_fsqrtd(void)
|
|
{
|
|
do_fsqrtd();
|
|
}
|
|
|
|
void OPPROTO op_fmuls(void)
|
|
{
|
|
FT0 *= FT1;
|
|
}
|
|
|
|
void OPPROTO op_fmuld(void)
|
|
{
|
|
DT0 *= DT1;
|
|
}
|
|
|
|
void OPPROTO op_fsmuld(void)
|
|
{
|
|
DT0 = FT0 * FT1;
|
|
}
|
|
|
|
void OPPROTO op_fadds(void)
|
|
{
|
|
FT0 += FT1;
|
|
}
|
|
|
|
void OPPROTO op_faddd(void)
|
|
{
|
|
DT0 += DT1;
|
|
}
|
|
|
|
void OPPROTO op_fsubs(void)
|
|
{
|
|
FT0 -= FT1;
|
|
}
|
|
|
|
void OPPROTO op_fsubd(void)
|
|
{
|
|
DT0 -= DT1;
|
|
}
|
|
|
|
void OPPROTO op_fdivs(void)
|
|
{
|
|
FT0 /= FT1;
|
|
}
|
|
|
|
void OPPROTO op_fdivd(void)
|
|
{
|
|
DT0 /= DT1;
|
|
}
|
|
|
|
void OPPROTO op_fcmps(void)
|
|
{
|
|
do_fcmps();
|
|
}
|
|
|
|
void OPPROTO op_fcmpd(void)
|
|
{
|
|
do_fcmpd();
|
|
}
|
|
|
|
#ifdef USE_INT_TO_FLOAT_HELPERS
|
|
void OPPROTO op_fitos(void)
|
|
{
|
|
do_fitos();
|
|
}
|
|
|
|
void OPPROTO op_fitod(void)
|
|
{
|
|
do_fitod();
|
|
}
|
|
#else
|
|
void OPPROTO op_fitos(void)
|
|
{
|
|
FT0 = (float) *((int32_t *)&FT1);
|
|
}
|
|
|
|
void OPPROTO op_fitod(void)
|
|
{
|
|
DT0 = (double) *((int32_t *)&FT1);
|
|
}
|
|
#endif
|
|
|
|
void OPPROTO op_fdtos(void)
|
|
{
|
|
FT0 = (float) DT1;
|
|
}
|
|
|
|
void OPPROTO op_fstod(void)
|
|
{
|
|
DT0 = (double) FT1;
|
|
}
|
|
|
|
void OPPROTO op_fstoi(void)
|
|
{
|
|
*((int32_t *)&FT0) = (int32_t) FT1;
|
|
}
|
|
|
|
void OPPROTO op_fdtoi(void)
|
|
{
|
|
*((int32_t *)&FT0) = (int32_t) DT1;
|
|
}
|
|
|
|
void OPPROTO op_ld_asi()
|
|
{
|
|
helper_ld_asi(PARAM1, PARAM2, PARAM3);
|
|
}
|
|
|
|
void OPPROTO op_st_asi()
|
|
{
|
|
helper_st_asi(PARAM1, PARAM2, PARAM3);
|
|
}
|
|
|