qemu-e2k/hw/intc
Luc Michel 3dd0471b75 intc/arm_gic: Refactor secure/ns access check in the CPU interface
An access to the CPU interface is non-secure if the current GIC instance
implements the security extensions, and the memory access is actually
non-secure. Until then, it was checked with tests such as
  if (s->security_extn && !attrs.secure) { ... }
in various places of the CPU interface code.

With the implementation of the virtualization extensions, those tests
must be updated to take into account whether we are in a vCPU interface
or not. This is because the exposed vCPU interface does not implement
security extensions.

This commits replaces all those tests with a call to the
gic_cpu_ns_access() function to check if the current access to the CPU
interface is non-secure. This function takes into account whether the
current CPU is a vCPU or not.

Note that this function is used only in the (v)CPU interface code path.
The distributor code path is left unchanged, as the distributor is not
exposed to vCPUs at all.

Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180727095421.386-9-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-14 17:17:20 +01:00
..
allwinner-a10-pic.c
apic_common.c
apic.c
arm_gic_common.c intc/arm_gic: Add the virtualization extensions to the GIC state 2018-08-14 17:17:20 +01:00
arm_gic_kvm.c intc/arm_gic: Add the virtualization extensions to the GIC state 2018-08-14 17:17:20 +01:00
arm_gic.c intc/arm_gic: Refactor secure/ns access check in the CPU interface 2018-08-14 17:17:20 +01:00
arm_gicv2m.c
arm_gicv3_common.c hw/intc/arm_gicv3_common: Move gicd shift bug handling to gicv3_post_load 2018-08-06 16:19:33 +01:00
arm_gicv3_cpuif.c hw/intc/arm_gicv3: Check correct HCR_EL2 bit when routing IRQ 2018-07-24 11:42:15 +01:00
arm_gicv3_dist.c hw/intc/arm_gicv3: fix an extra left-shift when reading IPRIORITYR 2018-06-22 13:28:34 +01:00
arm_gicv3_its_common.c
arm_gicv3_its_kvm.c target/arm: Allow KVM device address overwriting 2018-06-22 13:28:35 +01:00
arm_gicv3_kvm.c hw/intc/arm_gicv3_kvm: Get prepared to handle multiple redist regions 2018-06-22 13:28:36 +01:00
arm_gicv3_redist.c hw/intc/arm_gicv3: fix an extra left-shift when reading IPRIORITYR 2018-06-22 13:28:34 +01:00
arm_gicv3.c hw/intc/arm_gicv3: Introduce redist-region-count array property 2018-06-22 13:28:36 +01:00
armv7m_nvic.c nvic: Change NVIC to support ARMv6-M 2018-08-14 17:17:19 +01:00
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c
exynos4210_combiner.c
exynos4210_gic.c hw/intc/exynos4210_gic: Turn instance_init into realize function 2018-07-23 15:21:27 +01:00
gic_internal.h intc/arm_gic: Add virtualization extensions helper macros and functions 2018-08-14 17:17:20 +01:00
gicv3_internal.h
grlib_irqmp.c
heathrow_pic.c
i8259_common.c
i8259.c
imx_avic.c
imx_gpcv2.c
intc.c
ioapic_common.c ioapic: support "info irq" 2018-06-28 19:05:37 +02:00
ioapic.c ioapic: remove useless lower bounds check 2018-07-06 18:39:19 +02:00
lm32_pic.c
Makefile.objs
mips_gic.c
nios2_iic.c
omap_intc.c
ompic.c
openpic_kvm.c
openpic.c
pl190.c
puv3_intc.c
realview_gic.c hw/*/realview: Fix introspection problem with 'realview_mpcore' & 'realview_gic' 2018-07-17 13:12:49 +01:00
s390_flic_kvm.c
s390_flic.c
sh_intc.c
slavio_intctl.c
trace-events target/arm: Escalate to correct HardFault when AIRCR.BFHFNMINS is set 2018-07-24 11:43:08 +01:00
vgic_common.h
xics_kvm.c ppc/xics: rework the ICS classes inheritance tree 2018-07-03 09:56:51 +10:00
xics_pnv.c ppc/xics: introduce ICP DeviceRealize and DeviceReset handlers 2018-07-03 09:56:51 +10:00
xics_spapr.c
xics.c ppc/xics: fix ICP reset path 2018-07-16 11:18:09 +10:00
xilinx_intc.c
xlnx-pmu-iomod-intc.c
xlnx-zynqmp-ipi.c