d537cf6c86
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
#include "vl.h"
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#include "cpu.h"
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/* Raise IRQ to CPU if necessary. It must be called every time the active
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IRQ may change */
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void cpu_mips_update_irq(CPUState *env)
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{
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if ((env->CP0_Status & (1 << CP0St_IE)) &&
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!(env->CP0_Status & (1 << CP0St_EXL)) &&
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!(env->CP0_Status & (1 << CP0St_ERL)) &&
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!(env->hflags & MIPS_HFLAG_DM)) {
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if ((env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
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!(env->interrupt_request & CPU_INTERRUPT_HARD)) {
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cpu_interrupt(env, CPU_INTERRUPT_HARD);
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}
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} else
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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}
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static void cpu_mips_irq_request(void *opaque, int irq, int level)
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{
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CPUState *env = (CPUState *)opaque;
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if (irq < 0 || irq > 7)
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return;
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if (level) {
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env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
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} else {
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env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
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}
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cpu_mips_update_irq(env);
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}
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void cpu_mips_irq_init_cpu(CPUState *env)
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{
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qemu_irq *qi;
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int i;
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qi = qemu_allocate_irqs(cpu_mips_irq_request, env, 8);
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for (i = 0; i < 8; i++) {
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env->irq[i] = qi[i];
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}
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}
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