qemu-e2k/target
Peter Maydell b52388129b tcg: Add support for TCGv_i128 in parameters and returns.
tcg: Add support for TCGv_i128 in cmpxchg.
 tcg: Test CPUJumpCache in tb_jmp_cache_clear_page
 tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}
 tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target
 target/arm: Use tcg_gen_atomic_cmpxchg_i128
 target/i386: Use tcg_gen_atomic_cmpxchg_i128
 target/i386: Use tcg_gen_nonatomic_cmpxchg_i{32,64}
 target/s390x: Use tcg_gen_atomic_cmpxchg_i128
 target/s390x: Use TCGv_i128 in passing and returning float128
 target/s390x: Implement CC_OP_NZ in gen_op_calc_cc
 -----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmPeiDYdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+hFQf+K1MkEK1wtpjnqrYD
 4l36Uo3B7w8Yi6FxbCx9NP78dJNNTjTn0zqhtISRKSzI7TGUCGnmQs40iqYrRe5S
 9x6LJgTJplI2dsANvtsTaWB5gNzhowPt5tlit+J6Q0POwvvwcBZAOumY8AYt1YP+
 dMsjBLw6HFaqSCU5IERZrB4kBwl61VTkTAtHL2utSZpdsOYoc3y2hzbJ/w3kLK2u
 YXnMvom+Gc1rvQTaSMgiPYFITyx/VtXDe+JQwNikpu7Na+RFjtu7cHmg/BtZFo6s
 15AsAS8JlENKAunpJiX41UR7SxB8MdyQL5LyjVNWo5F7+YgQuuO1gqYKt6qUwd+A
 oH2uBA==
 =xjMy
 -----END PGP SIGNATURE-----

Merge tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu into staging

tcg: Add support for TCGv_i128 in parameters and returns.
tcg: Add support for TCGv_i128 in cmpxchg.
tcg: Test CPUJumpCache in tb_jmp_cache_clear_page
tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}
tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target
target/arm: Use tcg_gen_atomic_cmpxchg_i128
target/i386: Use tcg_gen_atomic_cmpxchg_i128
target/i386: Use tcg_gen_nonatomic_cmpxchg_i{32,64}
target/s390x: Use tcg_gen_atomic_cmpxchg_i128
target/s390x: Use TCGv_i128 in passing and returning float128
target/s390x: Implement CC_OP_NZ in gen_op_calc_cc

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmPeiDYdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+hFQf+K1MkEK1wtpjnqrYD
# 4l36Uo3B7w8Yi6FxbCx9NP78dJNNTjTn0zqhtISRKSzI7TGUCGnmQs40iqYrRe5S
# 9x6LJgTJplI2dsANvtsTaWB5gNzhowPt5tlit+J6Q0POwvvwcBZAOumY8AYt1YP+
# dMsjBLw6HFaqSCU5IERZrB4kBwl61VTkTAtHL2utSZpdsOYoc3y2hzbJ/w3kLK2u
# YXnMvom+Gc1rvQTaSMgiPYFITyx/VtXDe+JQwNikpu7Na+RFjtu7cHmg/BtZFo6s
# 15AsAS8JlENKAunpJiX41UR7SxB8MdyQL5LyjVNWo5F7+YgQuuO1gqYKt6qUwd+A
# oH2uBA==
# =xjMy
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 04 Feb 2023 16:30:46 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu: (40 commits)
  tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target
  target/i386: Inline cmpxchg16b
  target/i386: Inline cmpxchg8b
  target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16b
  target/s390x: Implement CC_OP_NZ in gen_op_calc_cc
  target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG
  target/s390x: Use Int128 for passing float128
  target/s390x: Use Int128 for returning float128
  target/s390x: Copy wout_x1 to wout_x1_P
  target/s390x: Use Int128 for return from TRE
  target/s390x: Use Int128 for return from CKSM
  target/s390x: Use Int128 for return from CLST
  target/s390x: Use a single return for helper_divs64/u64
  target/s390x: Use a single return for helper_divs32/u32
  tests/tcg/s390x: Add cdsg.c
  tests/tcg/s390x: Add long-double.c
  tests/tcg/s390x: Add clst.c
  tests/tcg/s390x: Add div.c
  target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX
  target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-04 19:12:41 +00:00
..
alpha accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
arm target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP 2023-02-04 06:19:42 -10:00
avr target/avr: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cris target/cris: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
hexagon Hexagon (target/hexagon) implement mutability mask for GPRs 2023-01-05 09:19:02 -08:00
hppa target/hppa: Fix fid instruction emulation 2022-12-19 23:14:06 +01:00
i386 target/i386: Inline cmpxchg16b 2023-02-04 06:19:43 -10:00
loongarch target/loongarch: Disassemble pcadd* addresses 2023-01-23 15:36:36 -10:00
m68k m68k: fix 'bkpt' instruction in softmmu mode 2023-02-01 10:18:21 +01:00
microblaze bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
mips bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
nios2 target/nios2: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
openrisc target/openrisc: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
ppc target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX 2023-02-04 06:19:42 -10:00
riscv target/riscv: Remove helper_set_rod_rounding_mode 2023-01-20 10:14:14 +10:00
rx target/rx: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
s390x target/s390x: Implement CC_OP_NZ in gen_op_calc_cc 2023-02-04 06:19:43 -10:00
sh4 target/sh4: Mask restore of env->flags from tb->flags 2022-12-18 09:36:07 -08:00
sparc bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
tricore bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
xtensa target/xtensa: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
Kconfig
meson.build