qemu-e2k/hw/mips
Claudio Fontana 7827168471 cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
we cannot in principle make the TCG Operations field definitions
conditional on CONFIG_TCG in code that is included by both common_ss
and specific_ss modules.

Therefore, what we can do safely to restrict the TCG fields to TCG-only
builds, is to move all tcg cpu operations into a separate header file,
which is only included by TCG, target-specific code.

This leaves just a NULL pointer in the cpu.h for the non-TCG builds.

This also tidies up the code in all targets a bit, having all TCG cpu
operations neatly contained by a dedicated data struct.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-16-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-05 10:24:15 -10:00
..
boston.c hw/mips/boston: Check 64-bit support with cpu_type_is_64bit() 2021-01-14 17:13:53 +01:00
cps.c
fuloong2e.c docs/system: Remove deprecated 'fulong2e' machine alias 2021-01-14 17:13:54 +01:00
fw_cfg.c
fw_cfg.h
gt64xxx_pci.c
jazz.c cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
Kconfig hw/mips: Add Loongson-3 machine support 2021-01-04 23:36:03 +01:00
loongson3_bootp.c
loongson3_bootp.h
loongson3_virt.c hw/mips: Add Loongson-3 machine support 2021-01-04 23:36:03 +01:00
malta.c hw/mips: Use address translation helper to handle ENVP_ADDR 2021-01-04 23:36:03 +01:00
meson.build hw/mips: Add Loongson-3 machine support 2021-01-04 23:36:03 +01:00
mips_int.c
mipssim.c hw/mips: Make bootloader addresses unsigned 2021-01-04 23:36:03 +01:00
trace-events
trace.h