21 lines
557 B
C
21 lines
557 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* LoongArch 7A1000 I/O interrupt controller definitions
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*
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* Copyright (C) 2021 Loongson Technology Corporation Limited
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*/
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#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
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OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)
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/* Msi irq start start from 64 to 255 */
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#define PCH_MSI_IRQ_START 64
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#define PCH_MSI_IRQ_END 255
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#define PCH_MSI_IRQ_NUM 192
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struct LoongArchPCHMSI {
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SysBusDevice parent_obj;
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qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM];
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MemoryRegion msi_mmio;
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};
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