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The IBEX documentation [1] specifies the reset vector to be "the most significant 3 bytes of the boot address and the reset value (0x80) as the least significant byte". [1] https://github.com/lowRISC/ibex/blob/master/doc/03_reference/exception_interrupts.rst Signed-off-by: Alexander Wagner <alexander.wagner@ulal.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210420080008.119798-1-alexander.wagner@ulal.de Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| .. | ||
| Kconfig | ||
| boot.c | ||
| meson.build | ||
| microchip_pfsoc.c | ||
| numa.c | ||
| opentitan.c | ||
| riscv_hart.c | ||
| shakti_c.c | ||
| sifive_e.c | ||
| sifive_u.c | ||
| spike.c | ||
| virt.c | ||