.. |
insn_trans
|
target/riscv: fsd/fsw doesn't dirty FP state
|
2020-01-16 10:03:08 -08:00 |
cpu_bits.h
|
target/riscv: Add virtual register swapping function
|
2020-02-27 13:45:35 -08:00 |
cpu_helper.c
|
target/riscv: Add support for virtual interrupt setting
|
2020-02-27 13:45:39 -08:00 |
cpu_user.h
|
Supply missing header guards
|
2019-06-12 13:20:21 +02:00 |
cpu-param.h
|
tcg: Split out target/arch/cpu-param.h
|
2019-06-10 07:03:34 -07:00 |
cpu.c
|
target/riscv: Dump Hypervisor registers if enabled
|
2020-02-27 13:45:31 -08:00 |
cpu.h
|
target/riscv: Add virtual register swapping function
|
2020-02-27 13:45:35 -08:00 |
csr.c
|
target/riscv: Extend the SIP CSR to support virtulisation
|
2020-02-27 13:45:38 -08:00 |
fpu_helper.c
|
target/riscv: rationalise softfloat includes
|
2019-08-19 12:07:13 +01:00 |
gdbstub.c
|
target/riscv: Add the Hypervisor CSRs to CPUState
|
2020-02-27 13:45:25 -08:00 |
helper.h
|
|
|
insn16-32.decode
|
target/riscv: Split RVC32 and RVC64 insns into separate files
|
2019-05-24 12:09:22 -07:00 |
insn16-64.decode
|
target/riscv: Add checks for several RVC reserved operands
|
2019-05-24 12:09:25 -07:00 |
insn16.decode
|
target/riscv: Add checks for several RVC reserved operands
|
2019-05-24 12:09:25 -07:00 |
insn32-64.decode
|
|
|
insn32.decode
|
target/riscv: Name the argument sets for all of insn32 formats
|
2019-05-24 12:09:22 -07:00 |
instmap.h
|
target/riscv: progressively load the instruction during decode
|
2020-02-25 20:20:23 +00:00 |
Makefile.objs
|
riscv: hmp: Add a command to show virtual memory mappings
|
2019-09-17 08:42:43 -07:00 |
monitor.c
|
riscv: hmp: Add a command to show virtual memory mappings
|
2019-09-17 08:42:43 -07:00 |
op_helper.c
|
riscv: Set xPIE to 1 after xRET
|
2020-01-16 10:02:41 -08:00 |
pmp.c
|
target/riscv: PMP violation due to wrong size parameter
|
2019-10-28 08:46:33 -07:00 |
pmp.h
|
RISC-V: Check for the effective memory privilege mode during PMP checks
|
2019-06-23 23:44:41 -07:00 |
trace-events
|
target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events
|
2019-09-17 08:42:42 -07:00 |
translate.c
|
target/riscv: Print priv and virt in disas log
|
2020-02-27 13:45:31 -08:00 |